公开(公告)号：US10957637B2

公开(公告)日：2021-03-23

申请号：US16239400

申请日：2019-01-03

Applicant: Texas Instruments Incorporated

Inventor： Nazila Dadvand

IPC: H01L23/495 ,  H01L23/28 ,  H05K3/34 ,  H01L23/00 ,  H01L23/532

Abstract: A device and method for fabrication thereof is provided which results in corrosion resistance of metal flanges of a semiconductor package, such as a quad flat no-lead package (QFN). Using metal electroplating (such as electroplating of nickel (Ni) or nickel alloys on copper flanges of the QFN package), corrosion resistance for the flanges is provided using a process that allows an electric current to reach the entire backside of a substrate to permit electroplating. In addition, the method may be used to directly connect a semiconductor die to the metal substrate of the package.

公开(公告)号：US10832991B1

公开(公告)日：2020-11-10

申请号：US16404958

申请日：2019-05-07

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Nazila Dadvand ,  Sreenivasan Koduri

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  C25D3/38

Abstract: A leadless packaged semiconductor device includes a metal substrate having at least a first through-hole aperture having a first outer ring and a plurality of cuts through the metal substrate to define spaced apart metal pads on at least two sides of the first through-hole aperture. A semiconductor die that has a back side metal (BSM) layer on its bottom side and a top side with circuitry coupled to bond pads is mounted top side up on the first outer ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate bounding the first through-hole aperture that provides a die attachment that fills a bottom portion of the first through-hole aperture. Bond wires are between metal pads and the bond pads. A mold compound is also provided including between adjacent ones of the metal pads.

公开(公告)号：US10804201B2

公开(公告)日：2020-10-13

申请号：US16236101

申请日：2018-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Archana Venugopal ,  Benjamin Stassen Cook ,  Nazila Dadvand ,  Luigi Colombo

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/532 ,  C01B32/184 ,  H01L23/522

Abstract: A structure for a semiconductor device includes a dielectric layer and a metal layer. The structure also includes a plurality of unit cells. Each unit cell is formed of interconnected segments. The plurality of unit cells forms a lattice. The lattice is between the dielectric layer and the metal layer.

公开(公告)号：US10734304B2

公开(公告)日：2020-08-04

申请号：US16193089

申请日：2018-11-16

Applicant: Texas Instruments Incorporated

Inventor： Nazila Dadvand ,  Christopher Daniel Manack ,  Salvatore Frank Pavone

IPC: H01L23/367 ,  H05K1/02 ,  H01L23/373 ,  H01L21/288 ,  H01L21/285 ,  H01L21/78 ,  C25D3/38 ,  C23C14/16 ,  C23C18/38 ,  C25D3/46 ,  H01L21/768

Abstract: Described examples include a process that includes forming a diffusion barrier layer on a backside of a semiconductor wafer. The process also includes forming a seed copper layer on the diffusion barrier layer. The process also includes forming a copper layer on the seed copper layer. The process also includes immersion plating a silver layer on the copper layer.

公开(公告)号：US10714439B2

公开(公告)日：2020-07-14

申请号：US16107545

申请日：2018-08-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Nazila Dadvand ,  Helmut Rinck

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/78

Abstract: A system and method for bonding an electrically conductive mechanical interconnector (e.g., a bonding wire, solder, etc.) to an electrical contact (e.g., contact pad, termination on a printed circuit board (PCB), etc.) made from an electrically conductive metal (e.g., aluminum) on an electronic device (e.g., integrated circuit (IC), die, wafer, PCB, etc.) is provided. The electrical contact is chemically coated with a metal (e.g., cobalt) that provides a protective barrier between the mechanical interconnector and the electrical contact. The protective barrier provides a diffusion barrier to inhibit galvanic corrosion (i.e. ion diffusion) between the mechanical interconnector and the electrical contact.

公开(公告)号：US10714417B2

公开(公告)日：2020-07-14

申请号：US16791922

申请日：2020-02-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Nazila Dadvand ,  Christopher Daniel Manack

IPC: H01L23/48 ,  H01L23/498 ,  H01L23/00 ,  H01L23/532

Abstract: A packaged semiconductor device includes a metal substrate having a center aperture with a plurality of raised traces around the center aperture including a metal layer on a dielectric base layer. A semiconductor die that has a back side metal (BSM) layer is mounted top side up in a top portion of the center aperture. A single metal layer directly between the BSM layer and walls of the metal substrate bounding the center aperture to provide a die attachment that fills a bottom portion of the center aperture. Leads having at least one bend that contact the metal layer are on the plurality of traces and include a distal portion that extends beyond the metal substrate. Bond wires are between the traces and bond pads on the semiconductor die. A mold compound provides encapsulation.

公开(公告)号：US20200185318A1

公开(公告)日：2020-06-11

申请号：US16791922

申请日：2020-02-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Nazila Dadvand ,  Christopher Daniel Manack

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/532

Abstract: A packaged semiconductor device includes a metal substrate having a center aperture with a plurality of raised traces around the center aperture including a metal layer on a dielectric base layer. A semiconductor die that has a back side metal (BSM) layer is mounted top side up in a top portion of the center aperture. A single metal layer directly between the BSM layer and walls of the metal substrate bounding the center aperture to provide a die attachment that fills a bottom portion of the center aperture. Leads having at least one bend that contact the metal layer are on the plurality of traces and include a distal portion that extends beyond the metal substrate. Bond wires are between the traces and bond pads on the semiconductor die. A mold compound provides encapsulation.

公开(公告)号：US20200185309A1

公开(公告)日：2020-06-11

申请号：US16793887

申请日：2020-02-18

Applicant: Texas Instruments Incorporated

Inventor： Christopher Daniel Manack ,  Nazila Dadvand ,  Salvatore Pavone

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/532 ,  H01L23/492 ,  H01L23/49

Abstract: A microelectronic device is formed by thinning a substrate of the microelectronic device from a die attach surface of the substrate, and forming a copper-containing layer on the die attach surface of the substrate. A protective metal layer is formed on the copper-containing layer. Subsequently, the copper-containing layer is attached to a package member having a package die mount area. The protective metal layer may optionally be removed prior to attaching the copper-containing layer to the package member. Alternatively, the protective metal layer may be left on the copper-containing layer when the copper-containing layer is attached to the package member. A structure formed by the method is also disclosed.

公开(公告)号：US20200165124A1

公开(公告)日：2020-05-28

申请号：US16774529

申请日：2020-01-28

Applicant: Texas Instruments Incorporated

Inventor： Nazila Dadvand ,  Kathryn Schuck

IPC: B81B7/00 ,  B81C1/00 ,  H01L23/00

Abstract: A semiconductor package including a semiconductor die and at least one bondline positioned on the semiconductor die, the at least one bondline comprising a nickel lanthanide alloy diffusion barrier layer abutting a gold layer.

公开(公告)号：US20200051939A1

公开(公告)日：2020-02-13

申请号：US16660187

申请日：2019-10-22

Applicant: Texas Instruments Incorporated

Inventor： Nazila Dadvand ,  Christopher Daniel Manack ,  Salvatore Frank Pavone

IPC: H01L23/00 ,  C25D7/12 ,  B23K1/00 ,  H01L23/495

Abstract: A microelectronic device has bump bond structures on input/output (I/O) pads. The bump bond structures include copper-containing pillars, a barrier layer including cobalt and zinc on the copper-containing pillars, and tin-containing solder on the barrier layer. The barrier layer includes 0.1 weight percent to 50 weight percent cobalt and an amount of zinc equivalent to a layer of pure zinc 0.05 microns to 0.5 microns thick. A lead frame has a copper-containing member with a similar barrier layer in an area for a solder joint. Methods of forming the microelectronic device are disclosed.