公开(公告)号：US08878577B2

公开(公告)日：2014-11-04

申请号：US14081568

申请日：2013-11-15

申请人： IQ-Analog Corporation

发明人： Mikko Waltari ,  Michael Kappes ,  William Huff

IPC分类号： H03L7/06 ,  H03L7/18 ,  H03M1/06 ,  H03M1/08 ,  H03M1/12

CPC分类号： H03L7/091 ,  H03L7/093 ,  H03L7/097 ,  H03L7/18 ,  H03L7/1806 ,  H03L2207/10 ,  H03L2207/50 ,  H03M1/0626 ,  H03M1/0836 ,  H03M1/12 ,  H03M1/1215 ,  H03M1/1245

摘要： A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal.

摘要翻译： 提供了一种用于倍频抖动校正的系统和方法。 该方法接受具有第一频率的模拟参考信号，并且使用模拟参考信号导出具有大于第一频率的第二频率的系统时钟信号。 使用压控振荡器（VCO）的PLL是倍频器的一个例子。 该方法使用系统时钟信号对模拟参考信号的振幅进行采样，并将采样的模拟参考信号转换为数字化参考信号。 响应于将数字化参考信号与理想数字化参考信号进行比较，导出系统时钟信号的相位误差校正。 在第一时刻的相位误差校正可以应用于数字化数据信号，该数字化数据信号是先前从系统时钟信号在第一时刻采样的模拟数据信号转换的。