Methods of inter-integrated circuit addressing and devices for performing the same
    1.
    发明授权
    Methods of inter-integrated circuit addressing and devices for performing the same 有权
    集成电路寻址的方法和执行相同的设备

    公开(公告)号:US07587539B2

    公开(公告)日:2009-09-08

    申请号:US11706079

    申请日:2007-02-13

    IPC分类号: G06F13/00

    摘要: Inter-integrated circuit-capable devices for use on an inter-integrated circuit bus are disclosed. The inter-integrated circuit-capable devices include integrated, internally-configurable addressing registers in place of external pins. Cascaded systems of inter-integrated circuit-capable devices for easier addressing are also disclosed as are methods for writing address identifier codes to addressing registers of the cascaded, inter-integrated circuit-capable devices.

    摘要翻译: 公开了在集成电路总线上使用的具有集成电路的装置。 集成电路的器件包括集成的内部可配置寻址寄存器来代替外部引脚。 还公开了用于更容易寻址的集成电路设备的级联系统,用于将地址标识符代码写入级联的集成电路的设备的寻址寄存器的方法。

    Multi-cycle, multi-slope analog to digital converter
    2.
    发明授权
    Multi-cycle, multi-slope analog to digital converter 有权
    多周期,多斜率模数转换器

    公开(公告)号:US07064694B1

    公开(公告)日:2006-06-20

    申请号:US11115689

    申请日:2005-04-27

    IPC分类号: H03M1/00

    CPC分类号: H03M1/162 H03M1/1014 H03M1/52

    摘要: A multi-cycle, multi-slope analog to digital converter overlaps charge and discharge periods to reduce latency to the end of the measurement following a sampling window. Additionally, charging and discharging of an integration capacitor during the measurement cycle occurs between defined thresholds so as to avoid saturation within the analog to digital converter.

    摘要翻译: 多周期,多斜率模数转换器与充电和放电周期重叠,以减少采样窗口后测量结束的延迟。 此外,在测量周期期间,积分电容器的充电和放电发生在确定的阈值之间,以避免模数转换器内的饱和。

    Power over Ethernet system and method for detecting disconnection of a device
    3.
    发明授权
    Power over Ethernet system and method for detecting disconnection of a device 有权
    以太网供电系统及设备断线检测方法

    公开(公告)号:US08479023B2

    公开(公告)日:2013-07-02

    申请号:US12770319

    申请日:2010-04-29

    IPC分类号: G06F1/26

    CPC分类号: G06F1/266

    摘要: A detection system to detect disconnection of a powered device from a link of a power over Ethernet system is disclosed. The detection system can include closed-loop control configured to supply a predetermined test current to an electrically conductive path that includes at least a portion of the link via which the powered device is connectable for receiving power. A detector is configured to monitor the closed-loop control, the loop detector providing a disconnect signal if the closed-loop control is outside of expected operating parameters, thereby indicating that the powered device has been disconnected from the link.

    摘要翻译: 公开了一种用于检测有源设备与以太网供电系统的链路断开的检测系统。 检测系统可以包括闭环控制,其被配置为向包括至少一部分链路的导电路径提供预定的测试电流,该电力设备可以通过该部分可连接用于接收功率。 检测器被配置为监视闭环控制,如果闭环控制在预期操作参数之外,环路检测器提供断开信号,从而指示受电设备已经从链路断开。

    Circuit having integrated heating structure for parametric trimming
    4.
    发明授权
    Circuit having integrated heating structure for parametric trimming 有权
    具有集成加热结构的电路用于参数修整

    公开(公告)号:US08461589B1

    公开(公告)日:2013-06-11

    申请号:US13489257

    申请日:2012-06-05

    IPC分类号: H01L23/36 H01L23/58 H01L23/34

    摘要: An integrated circuit (IC) includes a heated portion. The heated portion/IC includes a substrate having a topside semiconductor surface having circuitry configured to provide a circuit function. A pre-metal dielectric (PMD) layer is on the topside semiconductor surface. A metal interconnect stack is on the PMD. A trim portion includes one or more temperature sensitive circuit components which affect a temperature behavior of the IC. The heated portion extends over and beyond an area of the trim portion having an integrated heating structure including at least a first heater formed from a metal interconnect level that includes a first plurality of winding segments which have a varying pitch. A heat spreader formed from a second metal interconnect layer is between trim portion and the first heater. Thermal plugs are lateral to the temperature sensitive circuit components and thermally couple the heat spreader to the topside semiconductor surface.

    摘要翻译: 集成电路(IC)包括加热部分。 加热部分/ IC包括具有顶侧半导体表面的基板,其具有被配置为提供电路功能的电路。 前金属电介质(PMD)层位于顶侧半导体表面上。 PMD上有一个金属互连堆叠。 修整部分包括影响IC的温度特性的一个或多个温度敏感电路部件。 加热部分延伸超过具有整体加热结构的修整部分的区域,该整体加热结构至少包括由金属互连级别形成的第一加热器,该第一加热器包括具有变化间距的第一多个绕组段。 由第二金属互连层形成的散热器在修剪部分和第一加热器之间。 热插头是温度敏感电路部件的侧面,并将散热器热耦合到顶侧半导体表面。

    Integrated thermal characterization and trim of polysilicon resistive elements
    5.
    发明授权
    Integrated thermal characterization and trim of polysilicon resistive elements 有权
    多晶硅电阻元件的集成热表征和微调

    公开(公告)号:US07855432B2

    公开(公告)日:2010-12-21

    申请号:US11527371

    申请日:2006-09-26

    申请人: Barry Jon Male

    发明人: Barry Jon Male

    IPC分类号: H01L29/00

    CPC分类号: H01L27/0802 H01C17/232

    摘要: Devices, systems, and methods for providing an on-chip, temperature-stable resistance network for generating a precision current or precision resistance are disclosed. The resistance network includes a first resistance material having a linear, negative temperature coefficient of resistance and a second resistance material having a linear, positive temperature resistance. The first and second resistance materials are arrayed in segments proximate to a local, pulsed thermal gradient and are combined or mixed, i.e., trimmed, to provide a zero or near zero thermal coefficient.

    摘要翻译: 公开了用于提供用于产生精密电流或精密电阻的片上温度稳定电阻网络的装置,系统和方法。 电阻网络包括具有线性,负温度系数电阻的第一电阻材料和具有线性正温度电阻的第二电阻材料。 第一和第二电阻材料以接近局部脉冲热梯度的分段排列,并被组合或混合,即修整,以提供零或接近零的热系数。

    Method and apparatus for characterizing a load on a data line
    6.
    发明授权
    Method and apparatus for characterizing a load on a data line 有权
    用于表征数据线上的负载的方法和装置

    公开(公告)号:US07366623B2

    公开(公告)日:2008-04-29

    申请号:US11138121

    申请日:2005-05-26

    IPC分类号: G01R19/00

    CPC分类号: G01R27/16

    摘要: A method for characterizing a load on a data line includes the steps of: (A) Applying at least three successive voltages to the data line. Each respective odd-numbered successive voltage of the at least three successive voltages has substantially a first voltage value displaced a first voltage interval from a reference voltage value. Each respective even-numbered successive voltage of the at least three successive voltages has substantially a second voltage value displaced a second voltage interval from the reference voltage value. (B) Measuring a respective current value on the data line while each of the at least three successive voltages is applied to the data line. (C) Comparing the respective current values for selected successive voltages of the at least three successive voltages to determine whether a hysteric impedance change occurs when voltage on the data line is varied.

    摘要翻译: 用于表征数据线上的负载的方法包括以下步骤:(A)向数据线施加至少三个连续的电压。 所述至少三个连续电压中的每个相应的奇数连续电压基本上具有从参考电压值偏移第一电压间隔的第一电压值。 所述至少三个连续电压的每个相应的偶数连续电压基本上具有从参考电压值偏移第二电压间隔的第二电压值。 (B)测量数据线上的相应电流值,同时将至少三个连续电压中的每一个施加到数据线。 (C)比较所选择的至少三个连续电压的连续电压的各个电流值,以确定当数据线上的电压发生变化时是否发生歇斯底里的阻抗变化。

    Galvanic isolation integrated in a signal channel
    7.
    发明申请
    Galvanic isolation integrated in a signal channel 审中-公开
    电信隔离集成在信号通道中

    公开(公告)号:US20080051158A1

    公开(公告)日:2008-02-28

    申请号:US11507999

    申请日:2006-08-22

    IPC分类号: H04B1/38

    CPC分类号: H04L25/0276 H04L25/0278

    摘要: A communication link between two isolated electrical devices provides for adjustable impedances coupled to the communication link signal paths to balance the signal paths and improve CMRR. The communication link may be a bidirectional capacitively coupled differential signal line to improve noise rejection. The capacitance may be realized as portions of circuit board traces, lead frames, IC pins and/or molding on ICs or on an IC package. The variable impedance compensates for variances in the capacitive coupling values so that the signal paths react similarly in the presence of noise or interference. The variable impedance may be set or programmed from stored values that may be digital or analog. The capacitive coupling of the differential signal line permits integration of isolated devices in a common package.

    摘要翻译: 两个隔离电气设备之间的通信链路提供耦合到通信链路信号路径的可调阻抗,以平衡信号路径并改善CMRR。 通信链路可以是双向电容耦合差分信号线,以改善噪声抑制。 电容可以实现为电路板迹线,引线框架,IC引脚的一部分和/或IC上的IC或IC封装上的模制。 可变阻抗补偿电容耦合值的方差,使得​​信号路径在存在噪声或干扰的情况下反应相似。 可以根据可能是数字或模拟的存储值来设置或编程可变阻抗。 差分信号线的电容耦合允许将公共封装中的隔离器件集成。

    System for difference calculation using a quad slope converter
    8.
    发明授权
    System for difference calculation using a quad slope converter 有权
    使用四边形转换器进行差分计算的系统

    公开(公告)号:US06717393B2

    公开(公告)日:2004-04-06

    申请号:US10120936

    申请日:2002-04-11

    申请人: Barry Jon Male

    发明人: Barry Jon Male

    IPC分类号: G01R2200

    摘要: A system for measuring signals in a non-linear network is provided which reduces the reliance on hardware and processing support when correcting for A/D offset by performing a pair of dual slope measurement cycles with an integrating analog to digital converter (ADC) circuit. Each of the measurement cycles has at least four phases including a first integrating phase and a first de-integrating phase followed by a second integrating phase and a second de-integrating phase. The system further includes an ADC controller operatively communicative with the integrating ADC circuit for detecting when the first count value is reached during the second de-integrating phase and then resetting the second count value in response to this detection so that the second count value is offset corrected at the end of the second de-integration phase. As a result, a difference calculation is automatically performed during the measurement cycle.

    摘要翻译: 提供了一种用于在非线性网络中测量信号的系统,通过使用积分模数转换器(ADC)电路执行一对双斜率测量周期来减少对校正A / D偏移的硬件和处理支持的依赖性。 每个测量周期具有至少四个相位,包括第一积分相位和第一去积分相位,随后是第二积分相位和第二去积分相位。 该系统还包括与积分ADC电路可操作地通信的ADC控制器,用于在第二去积分阶段期间检测何时到达第一计数值,然后响应于该检测复位第二计数值,使得第二计数值被偏移 在第二个去集成阶段结束时进行了修正。 结果,在测量周期中自动执行差分计算。

    SYSTEM AND METHOD FOR DETECTING DISCONNECTION OF A DEVICE
    9.
    发明申请
    SYSTEM AND METHOD FOR DETECTING DISCONNECTION OF A DEVICE 有权
    用于检测设备断开的系统和方法

    公开(公告)号:US20110154086A1

    公开(公告)日:2011-06-23

    申请号:US12770319

    申请日:2010-04-29

    IPC分类号: G06F11/30 G06F1/00

    CPC分类号: G06F1/266

    摘要: A detection system to detect disconnection of a powered device from a link of a power over Ethernet system is disclosed. The detection system can include closed-loop control configured to supply a predetermined test current to an electrically conductive path that includes at least a portion of the link via which the powered device is connectable for receiving power. A detector is configured to monitor the closed-loop control, the loop detector providing a disconnect signal if the closed-loop control is outside of expected operating parameters, thereby indicating that the powered device has been disconnected from the link.

    摘要翻译: 公开了一种用于检测有源设备与以太网供电系统的链路断开的检测系统。 检测系统可以包括闭环控制,其被配置为向包括至少一部分链路的导电路径提供预定的测试电流,该电力设备可以通过该部分可连接用于接收功率。 检测器被配置为监视闭环控制,如果闭环控制在预期操作参数之外,环路检测器提供断开信号,从而指示受电设备已经从链路断开。

    Methods of inter-integrated circuit addressing and devices for performing the same
    10.
    发明申请
    Methods of inter-integrated circuit addressing and devices for performing the same 有权
    集成电路寻址的方法和执行相同的设备

    公开(公告)号:US20070250648A1

    公开(公告)日:2007-10-25

    申请号:US11706079

    申请日:2007-02-13

    IPC分类号: G06F3/00

    摘要: Inter-integrated circuit-capable devices for use on an inter-integrated circuit bus are disclosed. The inter-integrated circuit-capable devices include integrated, internally-configurable addressing registers in place of external pins. Cascaded systems of inter-integrated circuit-capable devices for easier addressing are also disclosed as are methods for writing address identifier codes to addressing registers of the cascaded, inter-integrated circuit-capable devices.

    摘要翻译: 公开了在集成电路总线上使用的具有集成电路的装置。 集成电路的器件包括集成的内部可配置寻址寄存器来代替外部引脚。 还公开了用于更容易寻址的集成电路设备的级联系统,用于将地址标识符代码写入级联的集成电路的设备的寻址寄存器的方法。