Backlight module and display device

    公开(公告)号:US11947157B2

    公开(公告)日:2024-04-02

    申请号:US17875795

    申请日:2022-07-28

    CPC classification number: G02B6/009 G02B6/0068 G02B6/0078

    Abstract: Disclosed are a backlight module and a display device. The backlight module includes a plurality of lamp boards and a backplane. The backplane has a lamp board installation side. The lamp boards are spliced at the lamp board installation side to form a light-emitting area. A fastener is provided between two adjacent lamp boards and has a first end and an opposite second end. The first end has a first connecting structure, and two opposite sides of the second end are respectively provided with a first limit portion and a second limit portion. A second connecting structure corresponding to the first connecting structure is arranged on the lamp board installation side. The fastener is connected and fixed on the lamp board installation side through the first connecting structure and the second connecting structure. The first and second limit portions are respectively abutted against sides of the two adjacent lamp boards.

    TIMING CONTROLLER CONTROL METHOD AND TIMING CONTROLLER

    公开(公告)号:US20220157266A1

    公开(公告)日:2022-05-19

    申请号:US17421280

    申请日:2020-06-10

    Inventor: Mingliang WANG

    Abstract: The present disclosure relates to a method for controlling a timing controller and a timing controller. The method for controlling the timing controller includes: acquiring a bus address in a bus signal transmitted over an I2C bus, the I2C bus being connected to the timing controller; if the timing controller determining that the bus address matches an address of the timing controller, acquiring data information in the bus signal; acquiring an address of a target function circuit according to the data information; generating and transmitting a query instruction to a memory according to the address of the target function circuit, and receiving switch control data corresponding to the target function circuit fed back by the memory; controlling, according to the switch control data, a switch connected to the target function circuit to be turned on.

    MANUFACTURING METHOD FOR DISPLAY PANEL AND DISPLAY PANEL

    公开(公告)号:US20220037371A1

    公开(公告)日:2022-02-03

    申请号:US17377399

    申请日:2021-07-16

    Abstract: The present application discloses a manufacturing method for a display panel and the display panel, and the manufacturing method includes a manufacture procedure of forming an array substrate, where the manufacture procedure of forming an array substrate includes: forming a buffer layer with a preset pattern on a glass substrate; placing the glass substrate with the buffer layer formed thereon into an electrochemical deposition device, and performing electrochemical deposition to form a copper alloy metal layer corresponding to the buffer layer; heating and annealing the copper alloy metal layer to form a first metal layer; sequentially forming an insulating layer, an active layer, a second metal layer, a passivation layer and a transparent electrode layer on the first metal layer, where the first metal layer includes a buffer layer and a copper alloy metal layer.

    GATE DRIVE CIRCUIT, DISPLAY MODULE AND DISPLAY DEVICE

    公开(公告)号:US20220036849A1

    公开(公告)日:2022-02-03

    申请号:US17164068

    申请日:2021-02-01

    Abstract: A gate drive circuit includes: N array substrate row drive circuits arranged in cascade, an Nth array substrate row drive circuit is configured for outputting an Nth gate drive signal in response to a signal input terminal receiving a gate drive signal output by an N−1th array substrate row drive circuit to control Nth sub-pixels to charge; N auxiliary circuits, a timing signal input terminal is connected to an Nth timing control signal, a controlled terminal is connected to a pull-up control signal terminal of the N−1th array substrate row drive circuit, and an output terminal is connected to a gate drive signal output terminal; and the Nth auxiliary circuit is configured for controlling the Nth sub-pixels to charge in a determination that the Nth timing control signal connected to the timing signal input terminal and an N−1th pull-up control signal connected to the controlled terminal are both high level.

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