Systems and methods of alternative overlay calculation
    2.
    发明授权
    Systems and methods of alternative overlay calculation 有权
    替代覆盖计算的系统和方法

    公开(公告)号:US07783444B2

    公开(公告)日:2010-08-24

    申请号:US12056134

    申请日:2008-03-26

    IPC分类号: G01N37/00 G01C17/38

    CPC分类号: H01L21/68

    摘要: Methods and systems of alternative overlay calculation and of calculating overlay stability based on alternative overlay settings in a fabrication unit, and a computer readable medium are disclosed being capable of calculating alternative overlay error values based on alignment model parameters, alternative alignment model parameters, and overlay error values for a plurality of measurement positions.

    摘要翻译: 公开了基于制造单元中的替代重叠设置的替代重叠计算和计算覆盖稳定性的方法和系统,以及计算机可读介质,其能够基于对准模型参数,替代对准模型参数和覆盖来计算替代叠加误差值 多个测量位置的误差值。

    Alignment Calculation
    3.
    发明申请
    Alignment Calculation 失效
    对齐计算

    公开(公告)号:US20100030360A1

    公开(公告)日:2010-02-04

    申请号:US12184798

    申请日:2008-08-01

    IPC分类号: G06F19/00

    摘要: Alignment data from an exposure tool suitable for exposing a plurality of semiconductor wafers are provided, the alignment data including alignment values applied by the exposure tool to respective ones of the plurality of semiconductor wafers at a plurality of measured positions.

    摘要翻译: 提供了适用于暴露多个半导体晶片的曝光工具的对准数据,对准数据包括由多个测量位置中的曝光工具施加到多个半导体晶片中的相应半导体晶片的对准值。

    METHOD AND APPARATUS FOR FABRICATING WAFER BY CALCULATING PROCESS CORRECTION PARAMETERS
    4.
    发明申请
    METHOD AND APPARATUS FOR FABRICATING WAFER BY CALCULATING PROCESS CORRECTION PARAMETERS 审中-公开
    用于通过计算过程校正参数来制作WAF的方法和装置

    公开(公告)号:US20140212817A1

    公开(公告)日:2014-07-31

    申请号:US13749740

    申请日:2013-01-25

    申请人: Boris Habets

    发明人: Boris Habets

    IPC分类号: G05B19/418

    摘要: A method of calculating an overlay correction model in a unit for the fabrication of a wafer is disclosed. The method comprises measuring overlay deviations of a subset of first overlay marks and second overlay marks by determining the differences between the subset of first overlay marks generated in the first layer and corresponding ones of the subset of second overlay marks generated in the second layer.

    摘要翻译: 公开了一种用于制造晶片的单元中的覆盖校正模型的计算方法。 该方法包括通过确定在第一层中生成的第一覆盖标记的子集与在第二层中生成的第二覆盖标记的子集中的对应的子集之间的差异来测量第一覆盖标记和第二覆盖标记的子集的覆盖偏差。

    Method and apparatus for fabricating wafer by calculating process correction parameters

    公开(公告)号:US10295914B2

    公开(公告)日:2019-05-21

    申请号:US15358716

    申请日:2016-11-22

    申请人: Boris Habets

    发明人: Boris Habets

    IPC分类号: G03F7/20 H01L21/66 G05B17/02

    摘要: A method of calculating an overlay correction model in a unit for the fabrication of a wafer is disclosed. The method comprises measuring overlay deviations of a subset of first overlay marks and second overlay marks by determining the differences between the subset of first overlay marks generated in the first layer and corresponding ones of the subset of second overlay marks generated in the second layer.

    Method and system for determining deformations on a substrate
    6.
    发明申请
    Method and system for determining deformations on a substrate 审中-公开
    用于确定衬底上的变形的方法和系统

    公开(公告)号:US20080182344A1

    公开(公告)日:2008-07-31

    申请号:US11699926

    申请日:2007-01-30

    IPC分类号: H01L21/66

    CPC分类号: G01B21/32

    摘要: A method and system determines deformations in a substrate in the manufacturing of semiconductor devices. At least one property of vertical deformations of the substrate is measured at a plurality of locations on the substrate. Afterward, an automatic computation of horizontal deformations is determined based on the measured properties of vertical deformations with a model for the deformation behavior of the substrate.

    摘要翻译: 一种方法和系统在半导体器件的制造中确定衬底中的变形。 在衬底上的多个位置处测量衬底的垂直变形的至少一个特性。 之后,基于垂直变形的测量属性,用基板的变形行为的模型来确定水平变形的自动计算。

    Method and apparatus for simulation of lithography overlay

    公开(公告)号:US10379447B2

    公开(公告)日:2019-08-13

    申请号:US13938720

    申请日:2013-07-10

    申请人: Boris Habets

    发明人: Boris Habets

    IPC分类号: G03F9/00 G01N21/95 G03F7/20

    摘要: A method for simulation of lithography overlay is disclosed which comprises storing alignment parameters used to align a semiconductor wafer prior to a lithography step; storing process control parameters used during the lithography step on the semiconductor wafer; storing overlay parameters measured after the lithography step; calculating alternative alignment parameters and alternative process control parameters. The alternative alignment parameters and the alternative process control parameters are added to cleansed overlay parameters to obtain simulated lithography overlay data.

    Method and Apparatus for Simulation of Lithography Overlay
    8.
    发明申请
    Method and Apparatus for Simulation of Lithography Overlay 审中-公开
    光刻覆盖模拟方法与装置

    公开(公告)号:US20150019192A1

    公开(公告)日:2015-01-15

    申请号:US13938720

    申请日:2013-07-10

    申请人: Boris Habets

    发明人: Boris Habets

    IPC分类号: G06F17/50

    摘要: A method for simulation of lithography overlay is disclosed which comprises storing alignment parameters used to align a semiconductor wafer prior to a lithography step; storing process control parameters used during the lithography step on the semiconductor wafer; storing overlay parameters measured after the lithography step; calculating alternative alignment parameters and alternative process control parameters. The alternative alignment parameters and the alternative process control parameters are added to cleansed overlay parameters to obtain simulated lithography overlay data.

    摘要翻译: 公开了一种用于光刻覆盖的模拟方法,其包括在光刻步骤之前存储用于对准半导体晶片的对准参数; 将在光刻步骤期间使用的工艺控制参数存储在半导体晶片上; 存储在光刻步骤后测量的覆盖参数; 计算替代对齐参数和替代过程控制参数。 将替代对准参数和替代过程控制参数添加到清洁的覆盖参数中以获得模拟光刻覆盖数据。

    Systems and Methods of Alternative Overlay Calculation
    9.
    发明申请
    Systems and Methods of Alternative Overlay Calculation 有权
    替代叠加计算的系统和方法

    公开(公告)号:US20090248337A1

    公开(公告)日:2009-10-01

    申请号:US12056134

    申请日:2008-03-26

    IPC分类号: G06F19/00

    CPC分类号: H01L21/68

    摘要: Methods and systems of alternative overlay calculation and of calculating overlay stability based on alternative overlay settings in a fabrication unit, and a computer readable medium are disclosed being capable of calculating alternative overlay error values based on alignment model parameters, alternative alignment model parameters, and overlay error values for a plurality of measurement positions.

    摘要翻译: 公开了基于制造单元中的替代重叠设置的替代重叠计算和计算覆盖稳定性的方法和系统,以及计算机可读介质,其能够基于对准模型参数,替代对准模型参数和覆盖来计算替代叠加误差值 多个测量位置的误差值。

    Method and Apparatus for Fabricating Wafer By Calculating Process Correction Parameters
    10.
    发明申请
    Method and Apparatus for Fabricating Wafer By Calculating Process Correction Parameters 审中-公开
    通过计算过程校正参数制造晶圆的方法和装置

    公开(公告)号:US20170075230A1

    公开(公告)日:2017-03-16

    申请号:US15358716

    申请日:2016-11-22

    申请人: Boris Habets

    发明人: Boris Habets

    IPC分类号: G03F7/20 G05B17/02

    摘要: A method of calculating an overlay correction model in a unit for the fabrication of a wafer is disclosed. The method comprises measuring overlay deviations of a subset of first overlay marks and second overlay marks by determining the differences between the subset of first overlay marks generated in the first layer and corresponding ones of the subset of second overlay marks generated in the second layer.

    摘要翻译: 公开了一种用于制造晶片的单元中的覆盖校正模型的计算方法。 该方法包括通过确定在第一层中生成的第一覆盖标记的子集与在第二层中生成的第二覆盖标记的子集中的对应的子集之间的差异来测量第一覆盖标记和第二覆盖标记的子集的覆盖偏差。