FORMATION OF HIGH-K GATE STACKS IN SEMICONDUCTOR DEVICES
    1.
    发明申请
    FORMATION OF HIGH-K GATE STACKS IN SEMICONDUCTOR DEVICES 有权
    在半导体器件中形成高K栅极堆叠

    公开(公告)号:US20100171187A1

    公开(公告)日:2010-07-08

    申请号:US12637787

    申请日:2009-12-15

    IPC分类号: H01L29/78 H01L21/28

    摘要: A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is composed of a second high-K metallic oxide layer formed directly on a dipole induction layer. The dipole induction layer includes a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers. A metallic gate electrode is then formed on the composite layer. Formation of the various layers is such as to position the dipole induction layer of the composite layer between the gate electrode and substrate so as to shift the threshold voltage to a desired level. A high-K gate stack in a MOSFET device formed by the above method is also provided.

    摘要翻译: 形成用于MOSFET器件的高K栅极堆叠以控制MOSFET器件的阈值电压的方法。 第一高K金属氧化物层形成在半导体衬底上。 然后在第一层上直接形成至少一个复合层。 复合层由直接形成在偶极感应层上的第二高K金属氧化物层组成。 偶极子诱导层包括具有比第一和第二层更高的氧空位亲和力和更低的氧空位扩散率的高K金属氧化物。 然后在复合层上形成金属栅电极。 各层的形成使得将复合层的偶极子感应层定位在栅电极和衬底之间,以将阈值电压移动到期望的水平。 还提供了通过上述方法形成的MOSFET器件中的高K栅极堆叠。

    Formation of high-K gate stacks in semiconductor devices
    2.
    发明授权
    Formation of high-K gate stacks in semiconductor devices 有权
    在半导体器件中形成高K栅极叠层

    公开(公告)号:US08273618B2

    公开(公告)日:2012-09-25

    申请号:US12637787

    申请日:2009-12-15

    IPC分类号: H01L21/8238

    摘要: A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is composed of a second high-K metallic oxide layer formed directly on a dipole induction layer. The dipole induction layer includes a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers. A metallic gate electrode is then formed on the composite layer. Formation of the various layers is such as to position the dipole induction layer of the composite layer between the gate electrode and substrate so as to shift the threshold voltage to a desired level. A high-K gate stack in a MOSFET device formed by the above method is also provided.

    摘要翻译: 形成用于MOSFET器件的高K栅极堆叠以控制MOSFET器件的阈值电压的方法。 第一高K金属氧化物层形成在半导体衬底上。 然后在第一层上直接形成至少一个复合层。 复合层由直接形成在偶极感应层上的第二高K金属氧化物层组成。 偶极子诱导层包括具有比第一和第二层更高的氧空位亲和力和更低的氧空位扩散率的高K金属氧化物。 然后在复合层上形成金属栅电极。 各层的形成使得将复合层的偶极子感应层定位在栅电极和衬底之间,以将阈值电压移动到期望的水平。 还提供了通过上述方法形成的MOSFET器件中的高K栅极堆叠。