METAL FUSE BY TOPOLOGY
    1.
    发明申请
    METAL FUSE BY TOPOLOGY 有权
    金属保险丝通过拓扑学

    公开(公告)号:US20150187709A1

    公开(公告)日:2015-07-02

    申请号:US14142629

    申请日:2013-12-27

    摘要: Embodiments of the present disclosure describe techniques and configurations for overcurrent fuses in integrated circuit (IC) devices. In one embodiment, a device layer of a die may include a first line structure with a recessed portion between opposite end portions and two second line structures positioned on opposite sides of the first line structure. An isolation material may be disposed in the gaps between the line structures and in a first recess defined by the recessed portion. The isolation material may have a recessed portion that defines a second recess in the first recess, and a fuse structure may be disposed in the second recess. Other embodiments may be described and/or claimed.

    摘要翻译: 本公开的实施例描述了用于集成电路(IC)装置中的过电流保险丝的技术和配置。 在一个实施例中,管芯的器件层可以包括在相对端部之间具有凹陷部分的第一线结构和位于第一线结构的相对侧上的两个第二线结构。 隔离材料可以设置在线结构之间的间隙中,并且可以设置在由凹部限定的第一凹部中。 隔离材料可以具有限定第一凹部中的第二凹部的凹部,并且熔丝结构可以设置在第二凹部中。 可以描述和/或要求保护其他实施例。

    PILLAR RESISTOR STRUCTURES FOR INTEGRATED CIRCUITRY

    公开(公告)号:US20170162646A1

    公开(公告)日:2017-06-08

    申请号:US15129794

    申请日:2014-06-18

    摘要: Integrated circuit structures including a pillar resistor disposed over a surface of a substrate, and fabrication techniques to form such a resistor in conjunction with fabrication of a transistor over the substrate. Following embodiments herein, a small resistor footprint may be achieved by orienting the resistive length orthogonally to the substrate surface. In embodiments, the vertical resistor pillar is disposed over a first end of a conductive trace, a first resistor contact is further disposed on the pillar, and a second resistor contact is disposed over a second end of a conductive trace to render the resistor footprint substantially independent of the resistance value. Formation of a resistor pillar may be integrated with a replacement gate transistor process by concurrently forming the resistor pillar and sacrificial gate out of a same material, such as polysilicon. Pillar resistor contacts may also be concurrently formed with one or more transistor contacts.

    METHODS OF FORMING TUNEABLE TEMPERATURE COEFFICIENT FR EMBEDDED RESISTORS
    3.
    发明申请
    METHODS OF FORMING TUNEABLE TEMPERATURE COEFFICIENT FR EMBEDDED RESISTORS 有权
    形成可调谐温度系数FR嵌入式电阻的方法

    公开(公告)号:US20160181241A1

    公开(公告)日:2016-06-23

    申请号:US14909980

    申请日:2013-09-27

    IPC分类号: H01L27/06 H01L49/02

    摘要: Methods of forming resistor structures with tunable temperature coefficient of resistance are described. Those methods and structures may include forming an opening in a resistor material adjacent source/drain openings on a device substrate, forming a dielectric material between the resistor material and the source/drain openings, and modifying the resistor material, wherein a temperature coefficient resistance (TCR) of the resistor material is tuned by the modification. The modifications include adjusting a length of the resistor, forming a compound resistor structure, and forming a replacement resistor.

    摘要翻译: 描述了形成具有可调温度电阻系数的电阻结构的方法。 这些方法和结构可以包括在器件衬底上邻近源极/漏极开口处形成电阻器材料中的开口,在电阻器材料和源极/漏极开口之间形成电介质材料,并修改电阻材料,其中温度系数电阻( 电阻材料的TCR)通过修改进行调整。 修改包括调整电阻器的长度,形成复合电阻器结构以及形成替换电阻器。

    ANTIFUSE WITH BACKFILLED TERMINALS
    4.
    发明申请
    ANTIFUSE WITH BACKFILLED TERMINALS 审中-公开
    反垃圾邮件

    公开(公告)号:US20160336332A1

    公开(公告)日:2016-11-17

    申请号:US15110706

    申请日:2014-02-11

    IPC分类号: H01L27/112 H01L23/525

    摘要: An antifuse may include a non-planar conductive terminal having a high-z portion extending to a greater z-height than a low-z portion. A second conductive terminal is disposed over the low-z portion and separated from the first terminal by at least one intervening dielectric material. Fabrication of an antifuse may include forming a first opening in a first dielectric material disposed over a substrate, and undercutting a region of the first dielectric material. The undercut region of the first dielectric material is lined with a second dielectric material, such as gate dielectric material, through the first opening. A conductive first terminal material backfills the lined undercut region through the first opening. A second opening through the first dielectric material exposes the second dielectric material lining the undercut region. A conductive second terminal material is backfilled in the second opening.

    摘要翻译: 反熔丝可以包括具有延伸到比低z部分更大的z高度的高z部分的非平面导电端子。 第二导电端子设置在低z部分之上并且与第一端子分开由至少一个中间介电材料。 反熔丝的制造可以包括在布置在基板上的第一介电材料中形成第一开口,以及对第一介电材料的区域进行底切。 第一介电材料的底切区域通过第一开口衬有诸如栅极电介质材料的第二介电材料。 导电的第一端子材料通过第一开口填充衬里的底切区域。 穿过第一介电材料的第二开口暴露在底切区域内的第二电介质材料。 导电的第二端子材料在第二开口中被回填。