公开(公告)号：US07122870B2

公开(公告)日：2006-10-17

申请号：US10916191

申请日：2004-08-09

Applicant: John Barnak ,  Collin Borla ,  Mark Doczy ,  Markus Kuhn ,  Jacob M. Jensen

Inventor： John Barnak ,  Collin Borla ,  Mark Doczy ,  Markus Kuhn ,  Jacob M. Jensen

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H02L31/113

CPC classification number: H01L21/28088 ,  H01L29/4966

Abstract: A method of forming a gate electrode is described, comprising forming a dielectric layer on a substrate, forming a first metal layer having a first work function on the dielectric layer, forming a second metal layer having a second work function on the first metal layer, such that a gate electrode is formed on the dielectric layer which has a work function that is determined from the work function of the alloy of the two types of metal. The work function of a microelectronic transistor can be varied or “tuned” depending on the precise definition and control of the metal types, layer sequence, individual layer thickness and total number of layers.

Abstract translation: 描述了形成栅电极的方法，包括在基片上形成电介质层，在介电层上形成具有第一功函数的第一金属层，在第一金属层上形成具有第二功函数的第二金属层， 使得在电介质层上形成栅电极，其具有由两种类型的金属的合金的功函数确定的功函数。 微电子晶体管的功能可以根据金属类型，层序列，单层厚度和总层数的精确定义和控制而变化或“调谐”。

公开(公告)号：US20050009311A1

公开(公告)日：2005-01-13

申请号：US10916191

申请日：2004-08-09

Applicant: John Barnak ,  Collin Borla ,  Mark Doczy ,  Markus Kuhn ,  Jacob Jensen

Inventor： John Barnak ,  Collin Borla ,  Mark Doczy ,  Markus Kuhn ,  Jacob Jensen

IPC: H01L21/28 ,  H01L29/49 ,  H01L21/8238

CPC classification number: H01L21/28088 ,  H01L29/4966

Abstract: A method of forming a gate electrode is described, comprising forming a dielectric layer on a substrate, forming a first metal layer having a first work function on the dielectric layer, forming a second metal layer having a second work function on the first metal layer, such that a gate electrode is formed on the dielectric layer which has a work function that is determined from the work function of the alloy of the two types of metal. The work function of a microelectronic transistor can be varied or “tuned” depending on the precise definition and control of the metal types, layer sequence, individual layer thickness and total number of layers.

公开(公告)号：US20050233530A1

公开(公告)日：2005-10-20

申请号：US11154747

申请日：2005-06-15

Applicant: John Barnak ,  Mark Doczy ,  Robert Chau ,  Collin Borla

Inventor： John Barnak ,  Mark Doczy ,  Robert Chau ,  Collin Borla

IPC: H01L21/28 ,  H01L29/51 ,  H01L21/8238 ,  H01L21/336 ,  H01L21/8234

CPC classification number: H01L21/28194 ,  H01L29/513 ,  H01L29/518

Abstract: A technique for producing an enhanced gate structure having a silicon-nitride buffer. Embodiments relate to the structure and development of a gate structure having a silicon-nitride buffer layer deposited upon a dielectric layer, upon which a gate material, such as polysilicon, is deposited.

Abstract translation: 一种用于制造具有氮化硅缓冲液的增强栅极结构的技术。 实施例涉及具有沉积在电介质层上的氮化硅缓冲层的栅极结构的结构和发展，其上沉积诸如多晶硅的栅极材料。

公开(公告)号：US06849509B2

公开(公告)日：2005-02-01

申请号：US10315646

申请日：2002-12-09

Applicant: John Barnak ,  Collin Borla ,  Mark Doczy ,  Markus Kuhn ,  Jacob M. Jensen

Inventor： John Barnak ,  Collin Borla ,  Mark Doczy ,  Markus Kuhn ,  Jacob M. Jensen

IPC: H01L21/28 ,  H01L29/49 ,  H01L21/8234

CPC classification number: H01L21/28088 ,  H01L29/4966

Abstract: A method of forming a gate electrode is described, comprising forming a dielectric layer on a substrate, forming a first metal layer having a first work function on the dielectric layer, forming a second metal layer having a second work function on the first metal layer, such that a gate electrode is formed on the dielectric layer which has a work function that is determined from the work function of the alloy of the two types of metal. The work function of a microelectronic transistor can be varied or “tuned” depending on the precise definition and control of the metal types, layer sequence, individual layer thickness and total number of layers.

Abstract translation: 描述了形成栅电极的方法，包括在基片上形成电介质层，在介电层上形成具有第一功函数的第一金属层，在第一金属层上形成具有第二功函数的第二金属层， 使得在电介质层上形成栅电极，其具有由两种类型的金属的合金的功函数确定的功函数。 微电子晶体管的功能可以根据金属类型，层序列，单层厚度和总层数的精确定义和控制而变化或“调谐”。

公开(公告)号：US20050045961A1

公开(公告)日：2005-03-03

申请号：US10652350

申请日：2003-08-29

Applicant: John Barnak ,  Mark Doczy ,  Robert Chau ,  Collin Borla

Inventor： John Barnak ,  Mark Doczy ,  Robert Chau ,  Collin Borla

IPC: H01L21/28 ,  H01L29/51 ,  H01L29/76

CPC classification number: H01L21/28194 ,  H01L29/513 ,  H01L29/518

Abstract: A technique for producing an enhanced gate structure having a silicon-nitride buffer. Embodiments relate to the structure and development of a gate structure having a silicon-nitride buffer layer deposited upon a dielectric layer, upon which a gate material, such as polysilicon, is deposited.