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    Spread spectrum detection system and method
    1.
    发明授权
    Spread spectrum detection system and method 有权
    扩频检测系统及方法

    公开(公告)号：US07634033B1

    公开(公告)日：2009-12-15

    申请号：US11351464

    申请日：2006-02-10

    申请人： Thomas R. Giallorenzi ,  Johnny M. Harris ,  Dan M. Griffin ,  Richard Ertel ,  Eric K. Hall

    发明人： Thomas R. Giallorenzi ,  Johnny M. Harris ,  Dan M. Griffin ,  Richard Ertel ,  Eric K. Hall

    IPC分类号： H04B1/10

    CPC分类号： H04B1/7075

    摘要： A system and method for detecting a spread spectrum encoded message within a received signal is described. The spread spectrum encoded message has an unknown code phase, unknown code frequency offset, and unknown carrier frequency offset. A plurality of code phase hypotheses, code frequency offset hypotheses, and carrier frequency offset hypotheses are searched in parallel. The unknown code phase, unknown code frequency offset, and unknown carrier frequency offset may also be estimated.

    摘要翻译： 描述了用于在接收信号内检测扩频编码消息的系统和方法。 扩频编码消息具有未知码相位，未知码频率偏移和未知载波频率偏移。 并行搜索多个码相位假设，码频偏置假设和载波频偏估计。 还可以估计未知码相位，未知码频率偏移和未知载波频率偏移。

    Sub-sequence accumulation filter and method
    2.
    发明授权
    Sub-sequence accumulation filter and method 有权
    子序累积滤波器和方法

    公开(公告)号：US07606292B1

    公开(公告)日：2009-10-20

    申请号：US11136782

    申请日：2005-05-24

    申请人： Johnny M. Harris ,  Thomas R. Giallorenzi ,  Dan M. Griffin ,  Eric K. Hall ,  Richard B. Ertel

    发明人： Johnny M. Harris ,  Thomas R. Giallorenzi ,  Dan M. Griffin ,  Eric K. Hall ,  Richard B. Ertel

    IPC分类号： H04L5/12

    CPC分类号： H04B1/709 ,  H04B1/7093 ,  H04B2201/70707

    摘要： A parallel correlator and method includes temporarily storing in a series of P sequence registers, each of length R1, serial bit-sequences of a code of length N=P*R1. In a first-level of processing, certain unique bit sequences are inverted to reduce the number of unique bit sequences by half. Identical bit-sequences are then combined and temporarily stored in a first-level sub-accumulation register. Alternatively, bit sequences differing by only one bit may be combined in a common first-level sub-accumulation register. Further levels of similar processing may be imposed, where each subsequent level taps and inverts only a portion of the bits in the above level of processing, thereby reducing the number of unique bit sequences. Finally, all negative energy is combined in one register position, inverted, and added to all positive energy in the other register positions. When the spreading code was aligned among the series of sequence registers, the energy is added coherently and an energy peak is output, indicating alignment of the spreading code in the sequence registers.

    摘要翻译： 并行相关器和方法包括临时存储长度为R1，长度为N = P * R1的码的串行比特序列的一系列P序列寄存器。 在第一级处理中，某些唯一的比特序列被反转以将唯一比特序列的数量减少一半。 然后将相同的比特序列组合并临时存储在第一级子累加寄存器中。 或者，只有一位不同的比特序列可以组合在公共的第一级子累加寄存器中。 可以施加更多级别的类似处理，其中每个后续级别在上述处理级别中仅抽头并反转一部分位，由此减少唯一位序列的数量。 最后，所有负能量组合在一个寄存器位置，反相，并加到其他寄存器位置的所有正能量上。 当扩展码在一系列序列寄存器中对齐时，相干地加入能量，并输出能量峰值，指示序列寄存器中扩展码的对齐。

    Phase error detector using I/Q interference cancellation
    3.
    发明授权
    Phase error detector using I/Q interference cancellation 有权
    使用I / Q干扰消除的相位误差检测器

    公开(公告)号：US07369606B1

    公开(公告)日：2008-05-06

    申请号：US10783048

    申请日：2004-02-19

    申请人： Richard B. Ertel ,  Dan M. Griffin ,  Johnny M. Harris ,  Eric K. Hall ,  Thomas R. Giallorenzi

    发明人： Richard B. Ertel ,  Dan M. Griffin ,  Johnny M. Harris ,  Eric K. Hall ,  Thomas R. Giallorenzi

    IPC分类号： H04B3/46

    CPC分类号： H04L27/0014 ,  H04L2027/0053 ,  H04L2027/0067

    摘要： A method is presented for estimating a phase error for first (rI) and second (rQ) orthogonal signal components spread respectively by different first cI and second cQ spreading codes. A cross-despread value IdQ and/or QdI is determined by despreading one signal component with the spreading codes associated with the other signal component (rI with cQ or rQ with cI). In parallel, the same signal component is also despread with its associated spreading code to determine an estimated data symbol for that component. An interference of Q into I or I into Q is calculated and multiplied by the estimated data symbol, and subtracted from the cross-despread value to achieve an estimate of phase error. Preferably, both cross-despread values are obtained, normalized to a common data rate, scaled to maximize signal to noise ratio, and combined into one phase error estimate. A phase error detector includes despreaders, multipliers, and adders to determine the cross-despread value and subtract the interference from it.

    摘要翻译： 提出了一种用于估计分别通过不同的第一（i）和（i）个正交信号分量传播的第一（r）I / Q）正交信号分量的相位误差的方法， SUB＆gt;和第二个C＆lt; Q＆gt;扩展码。 通过使用与另一个信号分量相关联的扩展码来解扩一个信号分量来确定交叉解扩值IdQ和/或QdI，其中，具有与其他信号分量相关联的扩展码（r 其中C 1和Q 3与C 1 H 3）。 并行地，相同的信号分量也用其相关联的扩展码进行解扩，以确定该分量的估计数据符号。 计算Q到I或I中的Q到Q的干扰，并将其乘以估计的数据符号，并从交叉解扩值中减去以实现相位误差的估计。 优选地，获得两个交叉解扩值，被归一化为公共数据速率，被缩放以最大化信噪比，并且被组合成一个相位误差估计。 相位误差检测器包括解扩器，乘法器和加法器，以确定交叉解扩值并从其中减去干扰。

    Digital clock recovery loop
    5.
    发明授权
    Digital clock recovery loop 失效
    数字时钟恢复回路

    公开(公告)号：US5982237A

    公开(公告)日：1999-11-09

    申请号：US5090

    申请日：1998-01-09

    申请人： George E. Pax ,  James E. O'Toole ,  Dan M. Griffin

    发明人： George E. Pax ,  James E. O'Toole ,  Dan M. Griffin

    IPC分类号： H03L7/089 ,  H03L7/113 ,  H04B1/707 ,  H04L7/033 ,  H03L1/00 ,  H03L7/18

    CPC分类号： H03L7/113 ,  H03L7/0895 ,  H03L7/0896 ,  H04L7/033 ,  H04B1/707

    摘要： A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit comprising:a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency detection and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase detection and adjusts the voltage on the control node of the voltage controlled oscillator.

    摘要翻译： 一种通信系统，包括从输入的数字数据中提取时钟信号的时钟恢复电路，所述时钟恢复电路包括：具有控制节点并具有产生具有响应于电压而变化的频率的输出波的输出的压控振荡器 应用于控制节点; 电荷泵和环路滤波器电路，用于控制压控振荡器的控制节点上的电压变化率; 启动电路，执行频率检测，并结合电荷泵和环路滤波器电路调节压控振荡器的控制节点上的电压; 以及执行相位检测并调节压控振荡器的控制节点上的电压的状态机。

    Method and apparatus to initiate communications between an unknown node and an existing secure network
    9.
    发明授权
    Method and apparatus to initiate communications between an unknown node and an existing secure network 有权
    启动未知节点与现有安全网络之间的通信的方法和装置

    公开(公告)号：US07609751B1

    公开(公告)日：2009-10-27

    申请号：US11136783

    申请日：2005-05-24

    申请人： Thomas R. Giallorenzi ,  Johnny M. Harris ,  Eric K. Hall ,  Richard B. Ertel ,  Dan M. Griffin

    发明人： Thomas R. Giallorenzi ,  Johnny M. Harris ,  Eric K. Hall ,  Richard B. Ertel ,  Dan M. Griffin

    IPC分类号： H04B1/00

    CPC分类号： H04B1/7087 ,  H04B1/7075

    摘要： A first node initiating communications with a second node already in a secure network sends a discovery burst having a preamble portion and a payload portion. The preamble portion is sent at a varying frequency between high and low thresholds that are reflective of Doppler uncertainty between the nodes. The second node continuously listens at a frequency, termed an acquisition frequency. A data sequence in the preamble portion, known to the second node, is received and used to determine the receive instant in the preamble portion, and thereby compare against the known frequency ramp to determine the frequency at which the payload portion will be received. Preferably, the first node varies the preamble portion between thresholds more than once within the time span of a single preamble portion, and the preamble and payload portions are spread with different spreading codes. The preamble portion may also be disguised with noise generated by the first node.

    摘要翻译： 发起与已经在安全网络中的第二节点的通信的第一节点发送具有前导码部分和有效载荷部分的发现脉冲串。 前导码部分以反映节点之间的多普勒不确定性的高阈值和低阈值之间的变化频率发送。 第二个节点连续以一个频率收听，称为采集频率。 在第二节点已知的前同步码部分中的数据序列被接收并用于确定前同步码部分中的接收时刻，从而与已知的频率斜坡进行比较，以确定有效负载部分将被接收的频率。 优选地，第一节点在单个前导码部分的时间跨度内多于一次地改变阈值之间的前导码部分，并且前导码和有效载荷部分以不同的扩展码扩展。 前同步码部分也可以伪装成由第一节点产生的噪声。

    Doped multi-rate spread spectrum composite code
    10.
    发明授权
    Doped multi-rate spread spectrum composite code 有权
    掺杂多速率扩频复合码

    公开(公告)号：US07526010B1

    公开(公告)日：2009-04-28

    申请号：US10915776

    申请日：2004-08-10

    申请人： Johnny M. Harris ,  Samuel C. Kingston ,  Thomas R. Giallorenzi ,  Dan M. Griffin ,  David W. Thorson ,  Richard B. Ertel

    发明人： Johnny M. Harris ,  Samuel C. Kingston ,  Thomas R. Giallorenzi ,  Dan M. Griffin ,  David W. Thorson ,  Richard B. Ertel

    IPC分类号： H04B1/00

    CPC分类号： H04B1/7093

    摘要： A composite code is made for example by exclusive-OR'ing each real element of a first constituent code A with each element of a second constituent code B to obtain a basic composite code. To suppress autocorrelation, differing numbers of doping code elements are inserted between code segments made from combining each element of code A with an element of code B. A matched filter first stage removes from its input the A code and any doping code added to it, summing the elements of code A. A matched filter second stage removes from its input the B code and any doping code added at the second level. The summed elements of code B are the input to the first stage. Optionally, the summed elements of the doping code at any level may be delayed and summed with the elements of the A code in the first stage.

    摘要翻译： 例如，通过将第一组成代码A的每个实际元素与第二组成代码B的每个元素进行异或运算以获得基本复合代码来进行复合代码。 为了抑制自相关，在将代码A的每个元素与代码B的元素组合而形成的代码段之间插入不同数量的掺杂代码元素。匹配滤波器第一级从其输入中去除A代码和添加到其中的任何掺杂代码， 对代码A的元素求和。匹配滤波器第二级从其输入中移除B代码和在第二级添加的任何掺杂代码。 代码B的总和元素是第一阶段的输入。 可选地，任何级别的掺杂代码的总和元素可以被延迟并与第一级中的A代码的元素相加。