公开(公告)号：US08729976B2

公开(公告)日：2014-05-20

申请号：US13182008

申请日：2011-07-13

申请人： Reimund Rebel ,  Jan H. Kuypers ,  David Locascio

发明人： Reimund Rebel ,  Jan H. Kuypers ,  David Locascio

IPC分类号： H03L1/00

CPC分类号： H03L1/022

摘要： Methods and apparatus for calibration and temperature compensation of oscillators having mechanical resonators are described. The method(s) may involve measuring the frequency of the oscillator at multiple discrete temperatures and adjusting compensation circuitry of the oscillator at the various temperatures. The compensation circuitry may include multiple programmable elements which may independently adjust the frequency behavior of the oscillator at a respective temperature. Thus, adjustment of the frequency behavior of the oscillator at one temperature may not alter the frequency behavior at a second temperature.

摘要翻译： 描述了具有机械谐振器的振荡器的校准和温度补偿的方法和装置。 该方法可以涉及在多个离散的温度下测量振荡器的频率，并且在各种温度下调整振荡器的补偿电路。 补偿电路可以包括多个可编程元件，其可以在相应的温度下独立地调节振荡器的频率特性。 因此，在一个温度下调节振荡器的频率特性可能不会改变在第二温度下的频率行为。

公开(公告)号：US20070040588A1

公开(公告)日：2007-02-22

申请号：US11206521

申请日：2005-08-17

申请人： Brandt Braswell ,  David LoCascio

发明人： Brandt Braswell ,  David LoCascio

IPC分类号： G11C27/02

CPC分类号： G11C27/026

摘要： A double sampled switched capacitor architecture as described herein includes an amplifier having two separate inputs corresponding to two separate amplifier sections. The amplifier uses a first differential transistor pair for the first amplifier section, a second differential transistor pair for the second amplifier section, a first tail current bias arrangement for the first differential transistor pair, and a second tail current bias arrangement for the second differential transistor pair. The tail current bias arrangements are driven by a bias switching architecture that alternately activates one tail current bias arrangement while at least partially deactivating the other tail current bias arrangement. The amplifier and bias switching architecture cooperate to eliminate gain error that would otherwise be caused by a common parasitic capacitance shared by a single amplifier section.

摘要翻译： 如本文所述的双采样开关电容器架构包括具有对应于两个单独的放大器部分的两个单独输入的放大器。 放大器使用用于第一放大器部分的第一差分晶体管对，用于第二放大器部分的第二差分晶体管对，用于第一差分晶体管对的第一尾电流偏置装置，以及用于第二差分晶体管的第二尾电流偏置装置 对。 尾电流偏置装置由偏置开关结构驱动，交替地激活一个尾电流偏压装置，同时至少部分地去激活另一尾电流偏置装置。 放大器和偏置开关结构协调以消除否则将由单个放大器部分共享的公共寄生电容引起的增益误差。

公开(公告)号：US20060259888A1

公开(公告)日：2006-11-16

申请号：US11128659

申请日：2005-05-12

申请人： James McClellan ,  Patrick Drennan ,  Douglas Garrity ,  David LoCascio ,  Michael McGowan

发明人： James McClellan ,  Patrick Drennan ,  Douglas Garrity ,  David LoCascio ,  Michael McGowan

IPC分类号： G06F17/50 ,  G06F19/00 ,  H01L25/00 ,  H03K19/00

CPC分类号： G06F17/5072 ,  H01L22/20

摘要： A method for placing tiles in an integrated circuit has matched devices that includes the steps of (1) calculating a metal spacing for tiles to be placed adjacent to the matched device in the integrated circuit; (2) calculating a lateral spacing for tiles to be placed adjacent to the matched device in the integrated circuit; (3) placing tiles about the matched device based on the metal spacing and the lateral spacing; (4) performing a density test in an area around the matched device; and (5) if a density test is not satisfied in the area around the matched device, dividing the matched device into at least two subdevices and repeating, with respect to each subdevice, the steps of calculating a metal spacing, calculating a lateral spacing, and placing tiles about each subdevice. The method is further adaptable to various kinds of matched devices including poly resistors, diffused resistors, double-poly capacitors, metal-insulator-metal capacitors, and fringe capacitors.

摘要翻译： 一种用于在集成电路中放置瓦片的方法具有匹配的装置，其包括以下步骤：（1）计算要放置在与集成电路中的匹配装置相邻的瓷砖的金属间隔; （2）计算与所述集成电路中的匹配装置相邻放置的瓦片的横向间隔; （3）基于所述金属间隔和所述横向间隔，在匹配的装置周围放置瓦片; （4）在匹配装置周围的区域中进行密度测试; （5）如果在匹配装置周围的区域中不满足密度测试，则将匹配的装置分成至少两个子装置，并且相对于每个子装置重复计算金属间距，计算横向间隔的步骤， 并在每个子设备上放置瓷砖。 该方法还适用于多种匹配器件，包括聚电阻器，扩散电阻器，双重多晶硅电容器，金属 - 绝缘体 - 金属电容器和条纹电容器。

公开(公告)号：US20120013410A1

公开(公告)日：2012-01-19

申请号：US13182008

申请日：2011-07-13

申请人： Reimund Rebel ,  Jan H. Kuypers ,  David Locascio

发明人： Reimund Rebel ,  Jan H. Kuypers ,  David Locascio

IPC分类号： H03L1/02

CPC分类号： H03L1/022

摘要： Methods and apparatus for calibration and temperature compensation of oscillators having mechanical resonators are described. The method(s) may involve measuring the frequency of the oscillator at multiple discrete temperatures and adjusting compensation circuitry of the oscillator at the various temperatures. The compensation circuitry may include multiple programmable elements which may independently adjust the frequency behavior of the oscillator at a respective temperature. Thus, adjustment of the frequency behavior of the oscillator at one temperature may not alter the frequency behavior at a second temperature.

摘要翻译： 描述了具有机械谐振器的振荡器的校准和温度补偿的方法和装置。 该方法可以涉及在多个离散的温度下测量振荡器的频率，并且在各种温度下调整振荡器的补偿电路。 补偿电路可以包括多个可编程元件，其可以在相应的温度下独立地调节振荡器的频率特性。 因此，在一个温度下调节振荡器的频率特性可能不会改变在第二温度下的频率行为。

公开(公告)号：US20100315170A1

公开(公告)日：2010-12-16

申请号：US12830056

申请日：2010-07-02

申请人： David Locascio ,  Reimund Rebel ,  Jan H. Kuypers

发明人： David Locascio ,  Reimund Rebel ,  Jan H. Kuypers

IPC分类号： H03L7/00

CPC分类号： H03L7/00 ,  H03B5/30 ,  H03B5/326 ,  H03H9/17 ,  H03H9/2426 ,  H03H9/25 ,  H03H2009/02204

摘要： Methods and apparatus for tuning devices having resonators are described. Phase shifters are included in the circuits and used to shift the phase of the output signal(s) of the resonators. In some implementations, the phase shifters are configured in a feedback loop with the resonators. One or more of the apparatus described herein may be implemented as part, or all, of a microelectromechanical system (MEMS).

摘要翻译： 描述用于调谐具有谐振器的装置的方法和装置。 移相器包括在电路中，并用于移位谐振器的输出信号的相位。 在一些实现中，移相器被配置在与谐振器的反馈回路中。 本文所描述的一种或多种装置可以被实现为微机电系统（MEMS）的一部分或全部。

公开(公告)号：US08456250B2

公开(公告)日：2013-06-04

申请号：US12830056

申请日：2010-07-02

申请人： David Locascio ,  Reimund Rebel ,  Jan H. Kuypers

发明人： David Locascio ,  Reimund Rebel ,  Jan H. Kuypers

IPC分类号： H03B5/30 ,  H03B5/32

CPC分类号： H03L7/00 ,  H03B5/30 ,  H03B5/326 ,  H03H9/17 ,  H03H9/2426 ,  H03H9/25 ,  H03H2009/02204

摘要： Methods and apparatus for tuning devices having resonators are described. Phase shifters are included in the circuits and used to shift the phase of the output signal(s) of the resonators. In some implementations, the phase shifters are configured in a feedback loop with the resonators. One or more of the apparatus described herein may be implemented as part, or all, of a microelectromechanical system (MEMS).

摘要翻译： 描述用于调谐具有谐振器的装置的方法和装置。 移相器包括在电路中，并用于移位谐振器的输出信号的相位。 在一些实现中，移相器被配置在与谐振器的反馈回路中。 本文所描述的一种或多种装置可以被实现为微机电系统（MEMS）的一部分或全部。

公开(公告)号：US20060284754A1

公开(公告)日：2006-12-21

申请号：US11154416

申请日：2005-06-15

申请人： Douglas Garrity ,  Brandt Braswell ,  David Locascio

发明人： Douglas Garrity ,  Brandt Braswell ,  David Locascio

IPC分类号： H03M1/12

CPC分类号： H03M1/1225 ,  H03M1/167 ,  H03M1/804

摘要： A switched-capacitor gain stage suitable for use with a pipelined analog to digital converter (“ADC”) is capable of processing two or more input channels. The analog input voltages from the multiple channels are concurrently sampled (every other clock phase), and the gain stage processes the samples using a double sampling technique, generates residual voltage samples (every clock phase), and generates digital outputs for the multiple channels in an alternating manner. The gain stage provides equal input loading for the input stages, which enhances the performance of the ADC.

摘要翻译： 适用于流水线模数转换器（“ADC”）的开关电容器增益级能够处理两个或多个输入通道。 来自多个通道的模拟输入电压被同时采样（每隔一个时钟相位），增益级使用双采样技术处理采样，产生残余电压采样（每个时钟相位），并为多个通道生成数字输出 交替的方式。 增益级为输入级提供相等的输入负载，增强了ADC的性能。

公开(公告)号：US20060225011A1

公开(公告)日：2006-10-05

申请号：US11100039

申请日：2005-04-05

申请人： James McClellan ,  Patrick Drennan ,  Douglas Garrity ,  David LoCascio ,  Michael McGowan

发明人： James McClellan ,  Patrick Drennan ,  Douglas Garrity ,  David LoCascio ,  Michael McGowan

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： The present invention provides a method for tiling an integrated circuit having a critically matched device such as a transistor. The method obtains an advantage of automatically improving metallic density over critically matched devices thus yielding improved CMP. The method may include the steps of: identifying critically matched devices in the integrated circuit; placing metal tiles over the critically matched device; performing a density test around each critically matched device; and if a density test is not satisfied around a critically matched device, placing at least one metal strip over a critically matched device.

摘要翻译： 本发明提供了一种用于平铺具有诸如晶体管等关键匹配器件的集成电路的方法。 该方法获得了自动提高临界匹配器件的金属密度的优点，从而产生改进的CMP。 该方法可以包括以下步骤：识别集成电路中的严格匹配的设备; 将金属砖放在严格匹配的设备上; 对每个严格匹配的设备进行密度测试; 并且如果在严格匹配的装置周围不能满足密度测试，则将至少一个金属带放置在严格匹配的装置上。

公开(公告)号：US06423961B1

公开(公告)日：2002-07-23

申请号：US09490238

申请日：2000-01-24

申请人： Andrea Niederkorn ,  Suhail Agwani ,  David LoCascio

发明人： Andrea Niederkorn ,  Suhail Agwani ,  David LoCascio

IPC分类号： H01J4014

CPC分类号： H04N5/3658 ,  H01L27/14643 ,  H04N5/3575

摘要： A pixel signal amplification circuit (200) receives a signal from a pixel element. A first semiconductor switch (225a) is connected to the pixel element and transfers a reset value of the pixel signal to a first storage capacitor (C1). A second semiconductor switch (235a) is also connected to the pixel element and transfers a sampled pixel signal to a second storage capacitor (C3). A differential voltage amplifier (OP1) generates an amplified signal of the difference between the values stored on the first and second storage capacitors (C1 and C3).

摘要翻译： 像素信号放大电路（200）从像素元件接收信号。 第一半导体开关（225a）连接到像素元件，并将像素信号的复位值传送到第一存储电容器（C1）。 第二半导体开关（235a）也连接到像素元件并将采样的像素信号传送到第二存储电容器（C3）。 差分电压放大器（OP1）产生存储在第一和第二存储电容器（C1和C3）上的值之间的差的放大信号。