公开(公告)号：US20150287680A1

公开(公告)日：2015-10-08

申请号：US14677649

申请日：2015-04-02

申请人： Jeonggi Jin ,  Byung Lyul Park ,  Jisoon Park ,  Sukchul Bang ,  Deokyoung Jung

发明人： Jeonggi Jin ,  Byung Lyul Park ,  Jisoon Park ,  Sukchul Bang ,  Deokyoung Jung

IPC分类号： H01L23/532 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L23/481 ,  H01L21/6835 ,  H01L21/76805 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76883 ,  H01L21/76898 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/06181 ,  H01L2224/11 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014

摘要： Semiconductor devices having through electrodes capped with self-aligned protection layers. The semiconductor device comprises a semiconductor substrate including an integrated circuit formed therein, an interlayer dielectric layer on the semiconductor substrate to cover the integrated circuit, an intermetal dielectric layer having at least one metal line that is provided on the interlayer dielectric layer and is electrically connected to integrated circuit, and a through electrode that vertically penetrates the interlayer dielectric layer and the semiconductor substrate. The through electrode includes a top portion that is capped with a first protection layer capable of preventing a constituent of the through electrode from being diffused away from the through electrode.

摘要翻译： 具有通过电极覆盖有自对准保护层的半导体器件。 半导体器件包括：半导体衬底，其包括形成在其中的集成电路;半导体衬底上的覆盖集成电路的层间介质层;具有至少一个金属线的金属间介电层，该金属线设置在层间电介质层上并电连接 到集成电路，以及垂直穿透层间电介质层和半导体衬底的贯通电极。 贯通电极包括顶部，该顶部被第一保护层盖住，该第一保护层能够防止通孔的构成物从通孔扩散。

公开(公告)号：US20100240194A1

公开(公告)日：2010-09-23

申请号：US12659841

申请日：2010-03-23

申请人： DeokYoung Jung ,  Ju-Seon Goo ,  Kyung-Mun Byun ,  Eunkee Hong ,  Jun-Won Lee

发明人： DeokYoung Jung ,  Ju-Seon Goo ,  Kyung-Mun Byun ,  Eunkee Hong ,  Jun-Won Lee

IPC分类号： H01L21/762

CPC分类号： H01L21/76224 ,  H01L21/76232

摘要： A method of fabricating a semiconductor device, the method including sequentially forming a pad oxide layer and a nitride layer on a substrate; etching the nitride layer, the pad oxide layer, and the substrate to form a trench; forming a sidewall oxide layer on a sidewall and a bottom of the trench; forming a oxide layer liner including nitrogen on the sidewall oxide layer; and forming a gap fill layer on the oxide layer liner

摘要翻译： 一种制造半导体器件的方法，所述方法包括在衬底上依次形成衬垫氧化物层和氮化物层; 蚀刻氮化物层，衬垫氧化物层和衬底以形成沟槽; 在沟槽的侧壁和底部上形成侧壁氧化物层; 在所述侧壁氧化物层上形成包括氮的氧化物层衬垫; 并在氧化层衬垫上形成间隙填充层

公开(公告)号：US09570377B2

公开(公告)日：2017-02-14

申请号：US14677649

申请日：2015-04-02

申请人： Jeonggi Jin ,  Byung Lyul Park ,  Jisoon Park ,  Sukchul Bang ,  Deokyoung Jung

发明人： Jeonggi Jin ,  Byung Lyul Park ,  Jisoon Park ,  Sukchul Bang ,  Deokyoung Jung

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L23/532

CPC分类号： H01L23/481 ,  H01L21/6835 ,  H01L21/76805 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76883 ,  H01L21/76898 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/06181 ,  H01L2224/11 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014

摘要： Semiconductor devices having through electrodes capped with self-aligned protection layers. The semiconductor device comprises a semiconductor substrate including an integrated circuit formed therein, an interlayer dielectric layer on the semiconductor substrate to cover the integrated circuit, an intermetal dielectric layer having at least one metal line that is provided on the interlayer dielectric layer and is electrically connected to integrated circuit, and a through electrode that vertically penetrates the interlayer dielectric layer and the semiconductor substrate. The through electrode includes a top portion that is capped with a first protection layer capable of preventing a constituent of the through electrode from being diffused away from the through electrode.

摘要翻译： 具有通过电极覆盖有自对准保护层的半导体器件。 半导体器件包括：半导体衬底，其包括形成在其中的集成电路;半导体衬底上的覆盖集成电路的层间介质层;具有至少一个金属线的金属间电介质层，该金属线设置在层间电介质层上并电连接 到集成电路，以及垂直穿透层间电介质层和半导体衬底的贯通电极。 贯通电极包括顶部，该顶部被第一保护层盖住，该第一保护层能够防止通孔的构成物从通孔扩散。