Schottky diode with minimal vertical current flow
    1.
    发明授权
    Schottky diode with minimal vertical current flow 有权
    肖特基二极管具有最小的垂直电流流动

    公开(公告)号:US07388271B2

    公开(公告)日:2008-06-17

    申请号:US11174190

    申请日:2005-07-01

    摘要: A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region in the first semiconductor region. The second semiconductor region has the first conductivity type and having a second dopant concentration greater than the first dopant concentration. The method also comprises forming a conductive contact to the first semiconductor region and forming a conductive contact to the second semiconductor region. The rectifying diode comprises a current path, and the path comprises: (i) the conductive contact to the first semiconductor region; (ii) the first semiconductor region; (iii) the second semiconductor region; and (iv) the conductive contact to the second semiconductor region. The second semiconductor region does not extend to a layer buried relative to the first semiconductor region.

    摘要翻译: 一种形成整流二极管的方法。 该方法包括提供第一导电类型的第一半导体区域并具有第一掺杂剂浓度并在第一半导体区域中形成第二半导体区域。 第二半导体区域具有第一导电类型并且具有大于第一掺杂剂浓度的第二掺杂剂浓度。 该方法还包括形成与第一半导体区域的导电接触并形成与第二半导体区域的导电接触。 整流二极管包括电流路径,并且路径包括:(i)到第一半导体区域的导电接触; (ii)第一半导体区域; (iii)第二半导体区域; 和(iv)到第二半导体区域的导电接触。 第二半导体区域不延伸到相对于第一半导体区域埋入的层。

    Schottky diode with minimal vertical current flow
    2.
    发明申请
    Schottky diode with minimal vertical current flow 有权
    肖特基二极管具有最小的垂直电流流动

    公开(公告)号:US20070001193A1

    公开(公告)日:2007-01-04

    申请号:US11174190

    申请日:2005-07-01

    IPC分类号: H01L29/74

    摘要: A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region in the first semiconductor region. The second semiconductor region has the first conductivity type and having a second dopant concentration greater than the first dopant concentration. The method also comprises forming a conductive contact to the first semiconductor region and forming a conductive contact to the second semiconductor region. The rectifying diode comprises a current path, and the path comprises: (i) the conductive contact to the first semiconductor region; (ii) the first semiconductor region; (iii) the second semiconductor region; and (iv) the conductive contact to the second semiconductor region. The second semiconductor region does not extend to a layer buried relative to the first semiconductor region.

    摘要翻译: 一种形成整流二极管的方法。 该方法包括提供第一导电类型的第一半导体区域并具有第一掺杂剂浓度并在第一半导体区域中形成第二半导体区域。 第二半导体区域具有第一导电类型并且具有大于第一掺杂剂浓度的第二掺杂剂浓度。 该方法还包括形成与第一半导体区域的导电接触并形成与第二半导体区域的导电接触。 整流二极管包括电流路径,并且路径包括:(i)到第一半导体区域的导电接触; (ii)第一半导体区域; (iii)第二半导体区域; 和(iv)到第二半导体区域的导电接触。 第二半导体区域不延伸到相对于第一半导体区域埋入的层。

    THIN FILM RESISTORS INTEGRATED AT A SINGLE METAL INTERCONNECT LEVEL OF DIE
    4.
    发明申请
    THIN FILM RESISTORS INTEGRATED AT A SINGLE METAL INTERCONNECT LEVEL OF DIE 有权
    薄膜电阻器集成在一个单一的金属互连级别上

    公开(公告)号:US20070069299A1

    公开(公告)日:2007-03-29

    申请号:US11239253

    申请日:2005-09-29

    IPC分类号: H01L21/331 H01L23/62

    摘要: An integrated circuit structure includes a first dielectric layer disposed on a semiconductor layer, a first thin film resistor disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the first thin film resistor, and a second thin film resistor disposed on the second dielectric layer. A first layer of interconnect conductors is disposed on the second dielectric layer and includes a first interconnect conductor contacting a first contact area of the first thin film resistor, a second interconnect conductor contacting a second contact area of the first thin film resistor, and a third interconnect conductor electrically contacting a first contact area of the second thin film resistor. A third dielectric layer is disposed on the second dielectric layer. A second layer of interconnect conductors is disposed on the third dielectric layer including a fourth interconnect conductor for contacting the second interconnect conductor. A fifth interconnect conductor of the first layer of interconnect conductors contacts the circuit element.

    摘要翻译: 集成电路结构包括设置在半导体层上的第一电介质层,设置在第一电介质层上的第一薄膜电阻器,设置在第一电介质层上的第二电介质层和第一薄膜电阻器,以及第二薄膜电阻器 设置在第二电介质层上。 第一层互连导体设置在第二电介质层上,并且包括与第一薄膜电阻器的第一接触区域接触的第一互连导体,与第一薄膜电阻器的第二接触区域接触的第二互连导体, 互连导体与第二薄膜电阻器的第一接触区域电接触。 第三电介质层设置在第二电介质层上。 第二层互连导体设置在第三介电层上,包括用于接触第二互连导体的第四互连导体。 第一互连导体层的第五互连导体接触电路元件。

    Spike implanted Schottky diode
    5.
    发明申请
    Spike implanted Schottky diode 审中-公开
    尖峰植入肖特基二极管

    公开(公告)号:US20070001256A1

    公开(公告)日:2007-01-04

    申请号:US11173695

    申请日:2005-07-01

    IPC分类号: H01L29/47

    CPC分类号: H01L29/872 H01L29/66143

    摘要: A rectifying diode. The diode comprises a first conductor region and a second conductor region. The diode further comprises a diode conductive path between the first conductor region and the second conductor region. The path comprises a first semiconductor volume having a non-uniform distribution of ions and a second semiconductor volume having a uniform distribution of ions relative to the first semiconductor volume.

    摘要翻译: 整流二极管。 二极管包括第一导体区域和第二导体区域。 二极管还包括在第一导体区域和第二导体区域之间的二极管导电路径。 路径包括具有不均匀离子分布的第一半导体体积和具有相对于第一半导体体积的离子均匀分布的第二半导体体积。

    Heat pipe stabilized specimen container
    6.
    发明授权
    Heat pipe stabilized specimen container 失效
    热管稳定标本容器

    公开(公告)号:US4617985A

    公开(公告)日:1986-10-21

    申请号:US769745

    申请日:1985-08-27

    摘要: A heat pipe stablized specimen container for irradiation of specimens at substantially constant temperature within a liquid metal cooled fast reactor comprises a heat pipe containing a vaporizable substance such as sodium. The container is of double-walled construction with the gap filled with argon and at top of the container a volume of argon is trapped within a cavity of the liquid metal level within the container in such a way that retention of argon in this zone is not dependent on sealing welds in the structure of the container, the argon blanket in this zone affording thermal insulation at the top of the container and also around part of the heat pipe, viz an adiabatic section of the latter. The heat pipe includes three layer wick structure 84 comprising an outer relatively fine mesh layer, a coarse intermediate layer and a fine inner layer for promoting unimpeded return of condensate to the evaporation section of the heat pipe while enhancing heat transfer with the heat pipe wall and reducing entrainment of the condensate by the upwardly rising vapor.

    摘要翻译: 用于在液体金属冷却的快速反应器内以基本恒定的温度照射样品的热管稳定样品容器包括含有可蒸发物质如钠的热管。 容器是双壁结构,其间隙填充有氩气,并且在容器的顶部,一定体积的氩被捕获在容器内的液态金属水平的空腔内,使得氩气在该区域中的保留不是 取决于容器结构中的密封焊缝,该区域中的氩气层在容器顶部提供热绝缘,并且还在热管的一部分周围,即后者的绝热部分。 热管包括三层芯结构84,其包括外部相对细的网格层,粗中间层和细内层,用于促进冷凝物不受阻碍地返回到热管的蒸发部分,同时增强与热管壁的热传递, 通过向上升的蒸气减少冷凝物的夹带。

    Thin film resistors integrated at two different metal interconnect levels of single die
    7.
    发明申请
    Thin film resistors integrated at two different metal interconnect levels of single die 有权
    薄膜电阻集成在两个不同的金属互连级别的单芯片上

    公开(公告)号:US20070069334A1

    公开(公告)日:2007-03-29

    申请号:US11238715

    申请日:2005-09-29

    IPC分类号: H01L29/00 H01L21/00

    摘要: An integrated circuit includes a first thin film resistor on a first dielectric layer. A first layer of interconnect conductors on the first dielectric layer includes a first and second interconnect conductors electrically contacting the first thin film resistor. A second dielectric layer is formed on the first dielectric layer. A second thin film resistor is formed on the second dielectric layer. A third dielectric layer is formed on the second dielectric layer. A second layer of interconnect conductors on the third dielectric layer includes a third interconnect conductor extending through an opening in the second and third dielectric layers to contact the first interconnect conductor, a fourth interconnect conductor extending through an opening in the second and third dielectric layers to contact the second interconnect conductor, and two interconnect conductors extending through openings in the third dielectric layer of the second thin film resistor. A fifth interconnect conductor extends through an opening in the first dielectric layer to contact a circuit element.

    摘要翻译: 集成电路包括在第一电介质层上的第一薄膜电阻器。 第一介电层上的第一互连导体层包括与第一薄膜电阻器电接触的第一和第二互连导体。 在第一电介质层上形成第二电介质层。 第二薄膜电阻器形成在第二电介质层上。 在第二电介质层上形成第三电介质层。 在第三电介质层上的第二层互连导体包括延伸穿过第二和第三电介质层中的开口以接触第一互连导体的第三互连导体,延伸穿过第二和第三电介质层中的开口的第四互连导体, 接触第二互连导体和延伸穿过第二薄膜电阻器的第三电介质层中的开口的两个互连导体。 第五互连导体延伸穿过第一介电层中的开口以接触电路元件。

    Unguarded schottky diodes with sidewall spacer at the perimeter of the diode
    9.
    发明申请
    Unguarded schottky diodes with sidewall spacer at the perimeter of the diode 审中-公开
    在二极管的周边具有侧壁间隔物的无保护的肖特基二极管

    公开(公告)号:US20060022291A1

    公开(公告)日:2006-02-02

    申请号:US10901003

    申请日:2004-07-28

    IPC分类号: H01L27/095

    CPC分类号: H01L27/0814 H01L29/872

    摘要: An unguarded Schottky barrier diode structure, which may be part of an integrated device, is provided that blocks the formation of a parasitic MIS diode at the diode's perimeter. The diode is formed in a semiconductive material which may comprise silicon. The portion of the semiconductive material at which the diode is formed may be called a diode portion of the semiconductive material. A highly conductive buried layer is provided under the diode portion of the semiconductive material. The highly conductive buried layer may comprise TiW, Ti, or TiN. The highly conductive buried layer extends laterally to a conductive plug extending to an upper conductive layer of the integrated or other device. A laterally extended silicide region is provided, which extends laterally to a perimeter. The silicide region comprises a lower semiconductor contact area on top of and in contact with the semiconductive material. The lower semiconductor contact area extends laterally to the perimeter. An insulative barrier is provided which surrounds the perimeter of the silicide region. A side wall spacer is provided which extends from the lateral edge portion of the insulative barrier to cover and contact part of the perimeter, thereby physically blocking formation of a parasitic MIS diode at the perimeter. A conductive diffusion barrier layer covers at least portions of the insulative barrier, the side wall spacer, and the silicide region.

    摘要翻译: 提供了一种无阻挡的肖特基势垒二极管结构,其可以是集成器件的一部分,其阻止在二极管周边形成寄生MIS二极管。 二极管形成为可以包括硅的半导体材料。 形成二极管的半导体材料的部分可以称为半导体材料的二极管部分。 在半导体材料的二极管部分之下提供高导电性掩埋层。 高导电性掩埋层可以包括TiW,Ti或TiN。 高导电性掩埋层横向延伸到延伸到集成或其他器件的上导电层的导电插塞。 提供横向延伸的硅化物区域,其横向延伸到周边。 硅化物区域包括在半导体材料的顶部和与半导体材料接触的下部半导体接触区域。 下半导体接触区域横向延伸到周边。 提供围绕硅化物区域的周边的绝缘屏障。 提供了一种侧壁间隔件,其从绝缘屏障的侧边缘部分延伸以覆盖并接触周边的一部分,从而在周边物理阻挡寄生MIS二极管的形成。 导电扩散阻挡层覆盖绝缘屏障,侧壁间隔物和硅化物区域的至少一部分。

    Anti-misting inorganic oxide glass compositions
    10.
    发明授权
    Anti-misting inorganic oxide glass compositions 失效
    防雾无机氧化物玻璃组合物

    公开(公告)号:US3989532A

    公开(公告)日:1976-11-02

    申请号:US439598

    申请日:1974-02-04

    CPC分类号: C03C3/16 C03C3/19 C03C3/21

    摘要: An optical article, for example, a lens, window or mirror, at least part of the surface of which, and preferably the whole of which, is an inorganic oxide glass having a P.sub.2 O.sub.5 content of at least 52 mole %, and preferably 55 to 68.5 mole %, an alkaline earth content of 2.7 to 20 mole %, and a transformation temperature of not greater than 300.degree. C, the glass optionally containing B.sub.2 O.sub.3 and at least one alkali metal oxide.

    摘要翻译: 光学制品,例如透镜,窗或镜,其表面的至少一部分,优选全部是具有至少52摩尔%的P2O5含量的无机氧化物玻璃,优选为55至 68.5摩尔%,碱土含量为2.7〜20摩尔%,转化温度为300℃以下,玻璃任选含有B 2 O 3和至少1种碱金属氧化物。