Computing module with serial data connectivity
    1.
    发明授权
    Computing module with serial data connectivity 有权
    具有串行数据连接功能的计算模块

    公开(公告)号:US08060675B2

    公开(公告)日:2011-11-15

    申请号:US12644511

    申请日:2009-12-22

    IPC分类号: G06F13/00

    摘要: A computing module includes an interface to asynchronously, serially exchange parallel system bus data with one or more other modules of a computer system that includes the computing module. The computing module can asynchronously, serially transfer first parallel bus data to another module of the computer system, and can asynchronously, serially receive second parallel bus data from another module of the computer system.

    摘要翻译: 计算模块包括异步地与包括计算模块的计算机系统的一个或多个其他模块串行交换并行系统总线数据的接口。 计算模块可以异步地将第一并行总线数据串行地传送到计算机系统的另一模块,并且可以异步地从计算机系统的另一个模块串行接收第二并行总线数据。

    Modular computer
    2.
    发明申请
    Modular computer 审中-公开
    模块化电脑

    公开(公告)号:US20060288141A1

    公开(公告)日:2006-12-21

    申请号:US11513806

    申请日:2006-08-31

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4045

    摘要: A modular computer system (20) including a universal connectivity station (UCS) (22) interconnected to a plurality of remote modules (30, 32, 34, 36, 38, 42) via a plurality of respective high speed serial links (26, 40) such as based on proprietary Split-Bridge™ technology. The plurality modules, including a processor module (42) which may include core parts including a CPU, memory, AGP Graphics, and system bus interface may be remotely located from each of the other modules, including the UCS (22). The present invention achieves technical advantages wherein each module of the modular computer system (20) appear to each device to be interconnected to the other on a parallel bus since the high speed serial links appear transparent. Preferably, although not necessary, each of the modules including the UCS 22 are based on the PCI bus architecture, or the PCMCIA bus architecture, although other bus architectures are well suited to be incorporated using the present invention. The processor module can be upgraded to change or improve the performance of the modular computer system 20 without requiring any changes to the remaining system, thus drastically improving the price to performance trade-offs of the system. Moreover, the operating system (OS) of each module, including both the software and hardware, do not need to be changed as the entire modular system (20) is based on a common architecture, such as the PCI or Cardbus bus architecture.

    摘要翻译: 一种模块化计算机系统(20),包括通过多个相应的高速串行链路(26,26)互连到多个远程模块(30,32,34,36,38,42)的通用连接站(UCS)(22) 40),例如基于专有的Split-Bridge(TM)技术。 包括可包括CPU,存储器,AGP图形和系统总线接口的核心部分的处理器模块(42)可以远程位于包括UCS(22)的其它模块中的每一个。 本发明实现了技术优点,其中模块化计算机系统(20)的每个模块出现在每个设备上,由于高速串行链路看起来是透明的,因此在并行总线上彼此互连。 优选地,虽然不是必需的,但是包括UCS 22的每个模块都基于PCI总线架构或PCMCIA总线架构,尽管其他总线架构非常适合于使用本发明来引入。 可以升级处理器模块以改变或改进模块化计算机系统20的性能,而不需要对剩余系统进行任何改变,从而大大提高系统的价格与性能的权衡。 此外,由于整个模块化系统(20)基于诸如PCI或Cardbus总线架构的通用架构,因此不需要改变每个模块的操作系统(OS),包括软件和硬件两者。

    Methods and apparatus for graphics pipeline relative addressing in a
multi-tasking windows system
    3.
    发明授权
    Methods and apparatus for graphics pipeline relative addressing in a multi-tasking windows system 失效
    多任务窗口系统中图形管道相对寻址的方法和装置

    公开(公告)号:US5420980A

    公开(公告)日:1995-05-30

    申请号:US33090

    申请日:1993-03-16

    IPC分类号: G09G5/14 G09G5/393 G06T15/00

    摘要: Graphics window systems which utilize graphics pipelines and graphics pipeline bypass buses. Hardware solutions for window relative rendering of graphics primitives, block moving of graphics primitives, transfer of large data blocks, and elimination of pipeline flushing are disclosed. The hardware implementations provided in accordance with the invention are interfaced along the pipeline bypass bus, thereby eliminating gross overhead processor time for the graphics pipeline and reducing pipeline latency. Methods and apparatus provided in accordance with the invention exhibit significant pipeline efficiency and reductions in time to render graphics primitives to the screen system.

    摘要翻译: 使用图形管线和图形管道旁路总线的图形窗口系统。 公开了用于图形基元的窗口相对渲染的硬件解决方案,块图形基元的移动,大数据块的传送以及消除管道冲洗。 根据本发明提供的硬件实现沿着流水线旁路总线接口,从而消除了图形管线的总开销处理器时间并减少了流水线延迟。 根据本发明提供的方法和装置显示出显着的流水线效率和缩短将图形图元渲染到屏幕系统的时间。

    Method and apparatus for providing and maximizing concurrent operations in a shared memory system which includes display memory
    5.
    发明授权
    Method and apparatus for providing and maximizing concurrent operations in a shared memory system which includes display memory 失效
    在包括显示存储器的共享存储器系统中提供和最大化并发操作的方法和装置

    公开(公告)号:US06434688B1

    公开(公告)日:2002-08-13

    申请号:US08530617

    申请日:1995-09-20

    IPC分类号: G06F1500

    CPC分类号: G06F12/0223 G06F12/02

    摘要: The present invention provides a low-cost computer system which includes a single sharable block of memory that can be independently accessible as graphics memory or main store system memory without performance degradation. Because the “appetite” for main system memory (unlike that of a display memory) is difficult to satisfy, the memory can be addressed by reallocating an unused portion of a display memory for system memory use. Reallocation of the unused display memory alleviates any need to oversize the display memory, yet realizes the cost effectiveness of using readily available memory sizes. Further, reallocation of the graphics memory avoids any need to separately consider both the system memory and the display memory in accommodating worst case operational requirements. In accordance with additional embodiments, improved efficiency of operation can be achieved to enhance concurrency between plural banks of memory when expansion memory is included. The addressable locations of the expansion memory can be mapped to the bottom of the available system address space, and addressable locations of any prior base system memory are moved above the expansion memory space.

    摘要翻译: 本发明提供了一种低成本计算机系统,其包括单个共享存储器块,其可以作为图形存储器或主存储系统存储器独立地访问,而不会降低性能。 由于主系统存储器(与显示存储器不同)的“胃口”难以满足,所以可以通过重新分配用于系统存储器使用的显示存储器的未使用部分来解决存储器。 未使用的显示存储器的重新分配减轻了对显示存储器进行超大尺寸的任何需求,但是实现了使用容易获得的存储器大小的成本效益。 此外,重新分配图形存储器避免了在适应最坏情况操作要求时单独考虑系统存储器和显示存储器的任何需要。 根据另外的实施例,当包括扩展存储器时,可以实现提高的操作效率以增强多组存储器之间的并发性。 扩展存储器的可寻址位置可以被映射到可用系统地址空间的底部,并且任何先前的基本系统存储器的寻址位置移动到扩展存储器空间之上。

    Method and apparatus for allocating display memory and main memory
employing access request arbitration and buffer control
    6.
    发明授权
    Method and apparatus for allocating display memory and main memory employing access request arbitration and buffer control 失效
    用于分配显示存储器和主存储器的方法和装置,其使用访问请求仲裁和缓冲器控制

    公开(公告)号:US5659715A

    公开(公告)日:1997-08-19

    申请号:US646555

    申请日:1996-05-08

    摘要: A low-cost, moderate performance small computer system is provided by allowing a single sharable block of memory to be independently accessible as graphics or main store memory. Allocation of the memory is selected programmably, eliminating the need to have the maximum memory size for each block simultaneously. Performance penalties are minimized by dynamically allocating the memory bandwidth on demand rather than through fixed time slices. A reallocatable memory subsystem enables transparent transfer of memory function of a lower-performance memory such as DRAM to occur in conjunction with a memory upgrade to a higher-performance memory such as VRAM, for example.

    摘要翻译: 通过允许单个可共享存储器块作为图形或主存储器独立地访问来提供低成本,中等性能的小型计算机系统。 可编程选择存储器的分配,消除了对于每个块同时具有最大存储器大小的需要。 通过根据需要而不是通过固定的时间片动态分配存储器带宽来最小化性能惩罚。 一个可重新分配的存储器子系统能够实现诸如DRAM之类的低性能存储器的存储器功能的透明传输,例如结合存储器升级到诸如VRAM等更高性能的存储器。

    Method and apparatus for screen refresh bandwidth reduction for video
display modes
    7.
    发明授权
    Method and apparatus for screen refresh bandwidth reduction for video display modes 失效
    用于视频显示模式的屏幕刷新带宽降低的方法和装置

    公开(公告)号:US5642136A

    公开(公告)日:1997-06-24

    申请号:US661404

    申请日:1996-06-07

    IPC分类号: G09G5/24 G09G5/36 G09G5/39

    CPC分类号: G09G5/24 G09G5/363

    摘要: In a text mode of a display controller, for each character of the text, a plurality of multiple-byte words are stored in a memory buffer. Each multiple-byte word contains an ASCII character code for the character, font attribute information for the character and at least one font line for the character. For each character font line to be displayed on the monitor, a multiple byte word is read. The attribute information and a first character font line are extracted from the multiple byte word. The display controller then constructs a character scan line for the character based on the attribute information and the first character font line. The character scan line may then be displaying on the monitor.

    摘要翻译: 在显示控制器的文本模式中,对于文本的每个字符,多个多字节字被存储在存储器缓冲器中。 每个多字节字包含字符的ASCII字符代码,字符的字体属性信息和字符的至少一个字体行。 对于要在监视器上显示的每个字符字体行,读取多字节字。 从多字节字提取属性信息和第一字符字体行。 然后,显示控制器基于属性信息和第一字符字体行构建字符的字符扫描线。 然后,字符扫描线可以在监视器上显示。

    Methods and apparatus for burst data block movement in a multi-tasking
windows system
    8.
    发明授权
    Methods and apparatus for burst data block movement in a multi-tasking windows system 失效
    多任务窗口系统中突发数据块移动的方法和装置

    公开(公告)号:US5564009A

    公开(公告)日:1996-10-08

    申请号:US459913

    申请日:1995-06-02

    IPC分类号: G09G5/14 G09G5/393 G06F12/00

    摘要: Graphics window systems which utilize graphics pipelines and graphics pipeline bypass buses. Hardware solutions for window relative rendering of graphics primitives, block moving of graphics primitives, transfer of large data blocks, and elimination of pipeline flushing are disclosed. The hardware implementations provided in accordance with the invention are interfaced along the pipeline bypass bus, thereby eliminating gross overhead processor time for the graphics pipeline and reducing pipeline latency. Methods and apparatus provided in accordance with the invention exhibit significant pipeline efficiency and reductions in time to render graphics primitives to the screen system.

    摘要翻译: 使用图形管线和图形管道旁路总线的图形窗口系统。 公开了用于图形基元的窗口相对渲染的硬件解决方案,块图形基元的移动,大数据块的传送以及消除管道冲洗。 根据本发明提供的硬件实现沿着流水线旁路总线接口,从而消除了图形管线的总开销处理器时间并减少了流水线延迟。 根据本发明提供的方法和装置显示出显着的流水线效率和缩短将图形图元渲染到屏幕系统的时间。

    Computing Module with Serial Data Connectivity
    9.
    发明申请
    Computing Module with Serial Data Connectivity 有权
    具有串行数据连接的计算模块

    公开(公告)号:US20100100650A1

    公开(公告)日:2010-04-22

    申请号:US12644511

    申请日:2009-12-22

    IPC分类号: G06F13/38

    摘要: A computing module includes an interface to asynchronously, serially exchange parallel system bus data with one or more other modules of a computer system that includes the computing module. The computing module can asynchronously, serially transfer first parallel bus data to another module of the computer system, and can asynchronously, serially receive second parallel bus data from another module of the computer system.

    摘要翻译: 计算模块包括异步地与包括计算模块的计算机系统的一个或多个其他模块串行交换并行系统总线数据的接口。 计算模块可以异步地将第一并行总线数据串行地传送到计算机系统的另一模块,并且可以异步地从计算机系统的另一模块串行地接收第二并行总线数据。

    Computing module with serial data conectivity
    10.
    发明申请
    Computing module with serial data conectivity 有权
    具有串行数据连续性的计算模块

    公开(公告)号:US20060095616A1

    公开(公告)日:2006-05-04

    申请号:US11300131

    申请日:2005-12-13

    IPC分类号: G06F13/38

    摘要: A modular computer system (20) including a universal connectivity station (UCS) (22) interconnected to a plurality of remote modules (30, 32, 34, 36, 38, 42) via a plurality of respective high speed serial links (26, 40) such as based on proprietary Split-Bridge™ technology. The plurality modules, including a processor module (42) which may include core parts including a CPU, memory, AGP Graphics, and system bus interface may be remotely located from each of the other modules, including the UCS (22). The present invention achieves technical advantages wherein each module of the modular computer system (20) appear to each device to be interconnected to the other on a parallel bus since the high speed serial links appear transparent. Preferably, although not necessary, each of the modules including the UCS 22 are based on the PCI bus architecture, or the PCMCIA bus architecture, although other bus architectures are well suited to be incorporated using the present invention. The processor module can be upgraded to change or improve the performance of the modular computer system 20 without requiring any changes to the remaining system, thus drastically improving the price to performance trade-offs of the system. Moreover, the operating system (OS) of each module, including both the software and hardware, do not need to be changed as the entire modular system (20) is based on a common architecture, such as the PCI or Cardbus bus architecture.

    摘要翻译: 一种模块化计算机系统(20),包括通过多个相应的高速串行链路(26,26)互连到多个远程模块(30,32,34,36,38,42)的通用连接站(UCS)(22) 40),例如基于专有的Split-Bridge(TM)技术。 包括可包括CPU,存储器,AGP图形和系统总线接口的核心部分的处理器模块(42)可以远程位于包括UCS(22)的其它模块中的每一个。 本发明实现了技术优点,其中模块化计算机系统(20)的每个模块出现在每个设备上,由于高速串行链路看起来是透明的,因此在并行总线上彼此互连。 优选地,虽然不是必需的,但是包括UCS 22的每个模块都基于PCI总线架构或PCMCIA总线架构,尽管其他总线架构非常适合于使用本发明来引入。 可以升级处理器模块以改变或改进模块化计算机系统20的性能,而不需要对剩余系统进行任何改变,从而大大提高系统的价格与性能的权衡。 此外,由于整个模块化系统(20)基于诸如PCI或Cardbus总线架构的通用架构,因此不需要改变每个模块的操作系统(OS),包括软件和硬件两者。