SIC MOSFET STRUCTURES WITH ASYMMETRIC TRENCH OXIDE

    公开(公告)号:US20220320295A1

    公开(公告)日:2022-10-06

    申请号:US17413396

    申请日:2020-06-18

    摘要: We herein describe a silicon-carbide (SiC) based power semiconductor device comprising: a drain region of a first conductivity type; a drift region of the first conductivity type disposed on the drain region, the drift region having a lower doping concentration compared to the doping concentration of the drain region; a body region of a second conductivity type, opposite to the first conductivity type, disposed over the drift region; a contact region of the first conductivity type, disposed within the body region; a source Ohmic contact being disposed on the source region; and one or more trench gate regions being in contact with the source region, the body region and the drift region. Each of the one or more trench gate regions are configured to form a channel region in the body region between the source region and the drift region. At least one trench gate region comprises: two vertical sidewalls and a bottom surface between the two vertical sidewalls; and an insulation layer along the vertical side walls and the bottom surface. The insulation layer comprises different thicknesses such that the insulation layer is thinner at a portion of one of the vertical sidewalls including the channel region than at the other vertical side wall and the trench bottom.

    SEMICONDUCTOR DEVICE SUB-ASSEMBLY

    公开(公告)号:US20210167042A1

    公开(公告)日:2021-06-03

    申请号:US17258577

    申请日:2018-07-11

    摘要: We disclose herein a semiconductor device sub-assembly comprising a plurality of semiconductor units of a first type, a plurality of semiconductor units of a second type; a plurality of conductive blocks operatively coupled with the plurality of semiconductor units, a conductive malleable layer operatively coupled with the plurality of conductive blocks, wherein the plurality of conductive blocks are located between the conductive malleable layer and the plurality of semiconductor units. In use, at least some of the plurality of conductive blocks are configured to apply a pressure on the conductive malleable layer, when a predetermined pressure is applied to the semiconductor device sub-assembly. At least one semiconductor unit of a second type is configured to withstand an applied pressure greater than a threshold pressure.

    REVERSE CONDUCTING IGBT WITH CONTROLLED ANODE INJECTION

    公开(公告)号:US20220320323A1

    公开(公告)日:2022-10-06

    申请号:US17413196

    申请日:2020-06-18

    摘要: We herein describe a semiconductor device comprising a first element portion formed on a substrate, the first element portion being an operating region of an insulated gate bipolar transistor (IGBT) and a second element portion formed on the substrate, the second element portion being an operating region of a diode. The first element portion comprises a first collector region of a second conductivity type, a drift region of a first conductivity type located over the first collector region, and formed by the semiconductor substrate, a first body region of a first conductivity type located over the drift region, a second body region of a second conductivity type located over the drift region, at least one first contact region of a first conductivity type located above the second body region and having a higher doping concentration compared to the first body region, at least one second contact region of a second conductivity type located laterally adjacent to the at least one first contact region, the at least one second contact region having a higher doping concentration than the second body region, a first plurality of trenches extending from a surface through the second body region of a second conductivity type into the drift region wherein the at least one first contact region adjoins at least one of the plurality of trenches so that, in use, a channel region is formed along said at least one trench of the first plurality of trenches and within the body region of a second conductivity type. A first trench of the first plurality of trenches is laterally spaced from a second trench of the first plurality of trenches by a first distance. The second element portion comprises a second collector region of a second conductivity type, the drift region of a first conductivity type located over the second collector region, a third body region of a second conductivity type located over the drift region, a second plurality of trenches extending from a surface through the third body region into the drift region. A first trench of the second plurality of trenches is laterally spaced from a second trench of the second plurality of trenches by a second distance, and the first distance is larger than the second distance. The semiconductor device further comprises a first terminal contact, wherein the first terminal contact is electrically connected to the at least one first contact region of a first conductivity type and the body region of a second conductivity type and a second terminal contact, wherein the second terminal contact is electrically connected to the first collector region and the second collector region.

    Semiconductor Device Sub-Assembly
    7.
    发明申请

    公开(公告)号:US20190259693A1

    公开(公告)日:2019-08-22

    申请号:US16311833

    申请日:2017-01-23

    摘要: We disclose herein a semiconductor device sub-assembly comprising: a plurality of semiconductor units laterally spaced to one another; a plurality of conductive blocks, wherein each conductive block is operatively coupled with each semiconductor unit; a conductive malleable layer operatively coupled with each conductive block, wherein the plurality of conductive blocks are located between the conductive malleable layer and the plurality of semiconductor units. In use, at least some of the plurality of conductive blocks are configured to apply a pressure on the conductive malleable layer, when a predetermined pressure is applied to the semiconductor device sub-assembly.

    SEMICONDUCTOR DEVICE
    8.
    发明公开

    公开(公告)号:US20240105645A1

    公开(公告)日:2024-03-28

    申请号:US18010619

    申请日:2021-08-27

    摘要: There is provided a semiconductor device 1, comprising: a housing comprising: a first housing electrode 4 and a second housing electrode 5 arranged at opposite sides of the housing, and a tubular housing element 8 arranged between the first and second housing electrodes 4, 5 and configured to electrically isolate the first and second housing electrodes 4, 5 from one another; at least one semiconductor chip 20 arranged within the housing between the first and second housing electrodes 4, 5; and a metal explosion shield 12 arranged within the housing, wherein the metal explosion shield 12 is configured to extend into a space formed between the at least one semiconductor chip 20 and the tubular housing element 8 such that the metal explosion shield surrounds the at least one semiconductor chip 20.

    POWER SEMICONDUCTOR DEVICE
    9.
    发明公开

    公开(公告)号:US20230299137A1

    公开(公告)日:2023-09-21

    申请号:US18009526

    申请日:2021-03-31

    摘要: There is provided a power semiconductor device 1, comprising: a semiconductor substrate 2 comprising: a base layer 5 selectively provided at a first side of the semiconductor substrate, and wherein the base layer has a first conductivity type; a collector layer 3 provided at a second side of the semiconductor substrate, wherein the second side is opposite to the first side, and wherein the collector layer has the first conductivity type; and a drift layer 4 having a second conductivity type opposite to the first conductivity type, wherein the drift layer is arranged between the collector layer 3 and the base layer 5; an active cell 15 provided in the semiconductor substrate 2, wherein the active cell 15 comprises an emitter region 7 which has the second conductivity type, an active base region 5-i which is a part of the base layer 5, an active gate trench 9 comprising a gate insulator 11 and an active gate electrode 10 disposed therein, and wherein the active gate trench 9 is configured to extend from a surface 16 of the semiconductor substrate 2 at the first side into the drift layer 4 along a first direction Y; and an insulation trench 17 provided in the substrate 2 and neighbouring the active cell 15, wherein the insulation trench 17 is filled with a dielectric material, wherein the active cell 15 has a first length L1 along a second direction X perpendicular to the first direction Y, and the insulation trench 17 has a second length L2 along the second direction X, and the first and second lengths L1 and L2 satisfy the relationship of 0.5 ≤ L2/L 1 ≤ 2.

    Semiconductor device sub-assembly
    10.
    发明授权

    公开(公告)号:US11574894B2

    公开(公告)日:2023-02-07

    申请号:US17258577

    申请日:2018-07-11

    摘要: We disclose herein a semiconductor device sub-assembly comprising a plurality of semiconductor units of a first type, a plurality of semiconductor units of a second type; a plurality of conductive blocks operatively coupled with the plurality of semiconductor units, a conductive malleable layer operatively coupled with the plurality of conductive blocks, wherein the plurality of conductive blocks are located between the conductive malleable layer and the plurality of semiconductor units. In use, at least some of the plurality of conductive blocks are configured to apply a pressure on the conductive malleable layer, when a predetermined pressure is applied to the semiconductor device sub-assembly. At least one semiconductor unit of a second type is configured to withstand an applied pressure greater than a threshold pressure.