Semiconductor device having load resistor and method of fabricating the same
    1.
    发明授权
    Semiconductor device having load resistor and method of fabricating the same 失效
    具有负载电阻的半导体器件及其制造方法

    公开(公告)号:US07306552B2

    公开(公告)日:2007-12-11

    申请号:US11292633

    申请日:2005-12-02

    IPC分类号: H01L21/20

    摘要: A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive layer patterns disposed on the active regions, a second conductive layer pattern covering the first conductive layer patterns and disposed on the isolation layer, the second conductive layer pattern and the first conductive layer patterns constituting a load resistor pattern, an upper insulating layer disposed over the load resistor pattern, and resistor contact plugs disposed over the active regions, the resistor contact plugs penetrating the upper insulating layer to contact the load resistor pattern.

    摘要翻译: 半导体器件包括具有电阻器区域的半导体衬底,设置在电阻器区域中的隔离层,限定有源区的隔离层,设置在有源区上的第一导电层图案,覆盖第一导电层图案的第二导电层图案和 设置在隔离层上,第二导电层图案和构成负载电阻图案的第一导电层图案,设置在负载电阻图案上的上绝缘层和设置在有源区上的电阻器接触插塞,电阻器接触插塞穿透 上绝缘层接触负载电阻图案。

    SEMICONDUCTOR DEVICE HAVING LOAD RESISTOR AND METHOD OF FABRICATING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE HAVING LOAD RESISTOR AND METHOD OF FABRICATING THE SAME 有权
    具有负载电阻的半导体器件及其制造方法

    公开(公告)号:US20080048242A1

    公开(公告)日:2008-02-28

    申请号:US11932740

    申请日:2007-10-31

    IPC分类号: H01L29/788

    摘要: A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive layer patterns disposed on the active regions, a second conductive layer pattern covering the first conductive layer patterns and disposed on the isolation layer, the second conductive layer pattern and the first conductive layer patterns constituting a load resistor pattern, an upper insulating layer disposed over the load resistor pattern, and resistor contact plugs disposed over the active regions, the resistor contact plugs penetrating the upper insulating layer to contact the load resistor pattern.

    摘要翻译: 半导体器件包括具有电阻器区域的半导体衬底,设置在电阻器区域中的隔离层,限定有源区的隔离层,设置在有源区上的第一导电层图案,覆盖第一导电层图案的第二导电层图案和 设置在隔离层上,第二导电层图案和构成负载电阻图案的第一导电层图案,设置在负载电阻图案上的上绝缘层和设置在有源区上的电阻器接触插塞,电阻器接触插塞穿透 上绝缘层接触负载电阻图案。

    Semiconductor device having load resistor and method of fabricating the same

    公开(公告)号:US20060118909A1

    公开(公告)日:2006-06-08

    申请号:US11292633

    申请日:2005-12-02

    IPC分类号: H01L29/00

    摘要: A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive layer patterns disposed on the active regions, a second conductive layer pattern covering the first conductive layer patterns and disposed on the isolation layer, the second conductive layer pattern and the first conductive layer patterns constituting a load resistor pattern, an upper insulating layer disposed over the load resistor pattern, and resistor contact plugs disposed over the active regions, the resistor contact plugs penetrating the upper insulating layer to contact the load resistor pattern.

    Semiconductor device having load resistor and method of fabricating the same
    9.
    发明授权
    Semiconductor device having load resistor and method of fabricating the same 有权
    具有负载电阻的半导体器件及其制造方法

    公开(公告)号:US07598536B2

    公开(公告)日:2009-10-06

    申请号:US11932740

    申请日:2007-10-31

    IPC分类号: H01L21/338

    摘要: A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive layer patterns disposed on the active regions, a second conductive layer pattern covering the first conductive layer patterns and disposed on the isolation layer, the second conductive layer pattern and the first conductive layer patterns constituting a load resistor pattern, an upper insulating layer disposed over the load resistor pattern, and resistor contact plugs disposed over the active regions, the resistor contact plugs penetrating the upper insulating layer to contact the load resistor pattern.

    摘要翻译: 半导体器件包括具有电阻器区域的半导体衬底,设置在电阻器区域中的隔离层,限定有源区的隔离层,设置在有源区上的第一导电层图案,覆盖第一导电层图案的第二导电层图案和 设置在隔离层上,第二导电层图案和构成负载电阻图案的第一导电层图案,设置在负载电阻图案上的上绝缘层和设置在有源区上的电阻器接触插塞,电阻器接触插塞穿透 上绝缘层接触负载电阻图案。