公开(公告)号：US20070224780A1

公开(公告)日：2007-09-27

申请号：US11466387

申请日：2006-08-22

申请人： Fu Tang CHU ,  Chi Yuam CHUNG

发明人： Fu Tang CHU ,  Chi Yuam CHUNG

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  H01L21/6835 ,  H01L24/27 ,  H01L2224/274

摘要： A method for dicing a wafer is provided. A layer of adhesive material is applied to the back surface of the wafer so as to provide a sufficient mechanical strength for the wafer during dicing process thereby preventing the dice diced from the wafer from undue chipping on the back surfaces and the side surfaces.

摘要翻译： 提供了一种用于切割晶片的方法。 将一层粘合剂材料施加到晶片的背面，以便在切割工艺期间为晶片提供足够的机械强度，从而防止从晶片切下的芯片在背表面和侧表面上不适当地破碎。

公开(公告)号：US20080176360A1

公开(公告)日：2008-07-24

申请号：US12017931

申请日：2008-01-22

申请人： Fu Tang CHU ,  Chi Yuam CHUNG

发明人： Fu Tang CHU ,  Chi Yuam CHUNG

IPC分类号： H01L21/50 ,  H01L21/78

CPC分类号： H01L21/78

摘要： A method for sawing a wafer includes the following steps. A wafer which has an active surface, a back surface and a plurality of longitudinal and transverse sawing lines is provided, wherein the sawing lines are located on the active surface so as to define a plurality of dies. A multiple tape is attached on the active surface of the wafer, wherein the multiple tape includes a first tape and a second tape, the second tape is located between the first tape and the active surface of the wafer, and the second tape is transparent. The back surface of the wafer is grinded. The first tape is removed. Finally, the wafer including the second tape is sawn along the sawing lines so as to separate the dies from one another.

摘要翻译： 锯切晶片的方法包括以下步骤。 提供具有活性表面，后表面和多个纵向和横向锯割线的晶片，其中锯切线位于有源表面上以限定多个管芯。 多个带附着在晶片的有源表面上，其中多个带包括第一带和第二带，第二带位于第一带和晶片的有源表面之间，第二带是透明的。 研磨晶片的背面。 第一个磁带被删除。 最后，包括第二带的晶片沿着锯线被锯切，以将模具彼此分开。

公开(公告)号：US20080045124A1

公开(公告)日：2008-02-21

申请号：US11785710

申请日：2007-04-19

申请人： Fu-Tang Chu ,  Chi-Yuam Chung ,  Ji-Ping Teng

发明人： Fu-Tang Chu ,  Chi-Yuam Chung ,  Ji-Ping Teng

IPC分类号： B24B1/00

CPC分类号： B24B7/228 ,  B24B1/00 ,  B28D5/00 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834

摘要： The present invention relates to a sawing method for a wafer. The sawing method of the invention comprises: (a) providing a wafer, the wafer having an active surface and a back surface, the active surface having a plurality of sawing lines; (b) coating a protection layer on the active surface and the sawing lines; (c) taping a grinding tape on a surface of the protection layer; (d) grinding the back surface of the wafer to thin the wafer; (e) removing the grinding tape; and (f) sawing the wafer to form a plurality of dice. Whereby, the problems of die cracking, die scratching, die contamination and peeling of the surface of the sawing lines can be avoided.

摘要翻译： 本发明涉及一种晶片的锯切方法。 本发明的锯切方法包括：（a）提供晶片，所述晶片具有活性表面和后表面，所述活性表面具有多个锯切线; （b）在活动表面和锯线上涂覆保护层; （c）将研磨带贴在保护层的表面上; （d）研磨晶片的背面以使晶片变薄; （e）去除研磨胶带; 和（f）锯切晶片以形成多个骰子。 由此，可以避免模具开裂，模具刮伤，模具污染和锯切面的剥离等问题。

公开(公告)号：US07749866B2

公开(公告)日：2010-07-06

申请号：US12017931

申请日：2008-01-22

申请人： Fu Tang Chu ,  Chi Yuam Chung

发明人： Fu Tang Chu ,  Chi Yuam Chung

IPC分类号： H01L21/301

CPC分类号： H01L21/78

摘要： A method for sawing a wafer includes the following steps. A wafer which has an active surface, a back surface and a plurality of longitudinal and transverse sawing lines is provided, wherein the sawing lines are located on the active surface so as to define a plurality of dies. A multiple-type tape is attached on the active surface of the wafer, wherein the multiple-type tape includes a first tape and a second tape, the second tape is located between the first tape and the active surface of the wafer, and the second tape is transparent. The back surface of the wafer is grinded. The first tape is removed. Finally, the wafer including the second tape is sawn along the sawing lines so as to separate the dies from one another.

摘要翻译： 锯切晶片的方法包括以下步骤。 提供具有活性表面，后表面和多个纵向和横向锯割线的晶片，其中锯切线位于有源表面上以限定多个管芯。 多晶带安装在晶片的有源表面上，其中多型带包括第一带和第二带，第二带位于第一带和晶片的有源表面之间，第二带 磁带是透明的。 研磨晶片的背面。 第一个磁带被删除。 最后，包括第二带的晶片沿着锯线被锯切，以将模具彼此分开。

公开(公告)号：US06691876B2

公开(公告)日：2004-02-17

申请号：US10056357

申请日：2002-01-25

申请人： Yu-Pin Tsai ,  Chih-Min Pao ,  Ching-Feng Tseng ,  Fu-Tang Chu

发明人： Yu-Pin Tsai ,  Chih-Min Pao ,  Ching-Feng Tseng ,  Fu-Tang Chu

IPC分类号： A47G1908

CPC分类号： H01L21/6732 ,  H01L21/67326

摘要： A semiconductor wafer cassette has a first side wall, a second side wall opposite the first side wall, a front surface, and a back surface opposite the front surface. A body defines an internal bay portion with slots for vertically receiving wafers, each slot of the internal bay portion having one support slab. The body also includes two parallel legs for supporting the cassette and a handle for handling the cassette.

摘要翻译： 半导体晶片盒具有第一侧壁，与第一侧壁相对的第二侧壁，前表面和与前表面相对的后表面。 主体限定具有用于垂直接收晶片的槽的内部间隔部分，内部间隔部分的每个槽具有一个支撑板。 该主体还包括用于支撑盒的两个平行腿和用于处理盒的手柄。

公开(公告)号：US06476504B1

公开(公告)日：2002-11-05

申请号：US09993772

申请日：2001-11-27

申请人： Fu Tang Chu ,  Ji Ping Teng

发明人： Fu Tang Chu ,  Ji Ping Teng

IPC分类号： H01L2348

CPC分类号： H01L24/83 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L2224/2919 ,  H01L2224/743 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/00

摘要： An adhesive pattern for attaching a semiconductor chip onto a non-uniform substrate is disclosed. The adhesive pattern comprises a double-k pattern formed on the substrate. The double-k pattern includes a longest major line and four shorter lines connected to the major line. The non-uniform substrate has a conductive circuit and a solder mask formed on the substrate including the circuit. The substrate has a die covering region for receiving the semiconductor chip. The conductive circuit of the substrate comprises a plurality of conductive traces unequally distributed on the die covering region. The double-k adhesive pattern of the present invention is applied onto the non-uniform substrate by a dispenser in a manner that the area on the substrate defined between the major line and the border of the die covering region has a trace density lower than the other area on the substrate.

摘要翻译： 公开了一种用于将半导体芯片附着在不均匀衬底上的粘合剂图案。 粘合剂图案包括在基底上形成的双k图案。 双k图案包括最长的主线和连接到主线的四条较短的线。 不均匀衬底具有形成在包括电路的衬底上的导电电路和焊接掩模。 衬底具有用于接收半导体芯片的管芯覆盖区域。 衬底的导电电路包括不均匀分布在管芯覆盖区域上的多个导电迹线。 通过分配器将本发明的双k粘合剂图案施加到不均匀的基底上，使得限定在模具覆盖区域的主线和边界之间的基板上的区域的痕量密度低于 衬底上的其他区域。