Method of fabricating self aligned semiconductor devices
    1.
    发明授权
    Method of fabricating self aligned semiconductor devices 失效
    制造自对准半导体器件的方法

    公开(公告)号:US4883767A

    公开(公告)日:1989-11-28

    申请号:US220353

    申请日:1988-07-14

    摘要: A self aligned method of fabricating a self aligned semiconductor device employs an initial step in which a first window having an inner perimeter and outer perimeter is opened through a first protective layer situated atop a semiconductor substrate, to divide the substrate into three separate zones. The window exposes a first surface portion of the semiconductor substrate and circumferentially defines or encompasses a second central portion of the protective layer as well as a second unexposed surface portion of the substrate. A third surface portion of the substrate lies beyond the outer perimeter of the first window. Precisely aligned substrate regions of the same or different conductivity type can be established by using differentially etchable materials to mask designated surface portions of the substrate.

    摘要翻译: 制造自对准半导体器件的自对准方法采用初始步骤,其中通过位于半导体衬底顶部的第一保护层打开具有内周边和外周边的第一窗口,以将衬底分成三个独立的区域。 窗口露出半导体衬底的第一表面部分并周向地限定或包围保护层的第二中心部分以及衬底的第二未曝光表面部分。 基板的第三表面部分位于第一窗口的外周边之外。 可以通过使用差分可蚀刻材料掩蔽衬底的指定表面部分来建立相同或不同导电类型的精确对准的衬底区域。

    Semiconductor device and method of fabrication
    2.
    发明授权
    Semiconductor device and method of fabrication 失效
    半导体器件及其制造方法

    公开(公告)号:US4810665A

    公开(公告)日:1989-03-07

    申请号:US77711

    申请日:1987-07-24

    摘要: A semiconductor device, such as a MOSFET or IGT, with a deep base region having a high dopant concentration at least as high as 5.times.10.sup.19 atoms per cubic centimeter and a method of fabrication are disclosed. The novel method involves formation of the deep base region at a later stage in the fabrication and reduces the leaching of dopant from the deep base region, as well as achieving greater control over the dopant concentration in the deep base region. Further, the increased dopant concentration in the deep base region lowers the base shunt resistance of the device to provide improved electrical ruggedness. For IGTs, parasitic thyristor action is reduced.

    摘要翻译: 公开了具有至少高达5×1019原子/立方厘米的高掺杂剂浓度的深基区的诸如MOSFET或IGT的半导体器件,以及制造方法。 该新方法涉及在制造的稍后阶段形成深碱性区域,并减少掺杂剂从深碱性区域的浸出,以及实现对深基区域中掺杂剂浓度的更大控制。 此外,深基底区域中增加的掺杂剂浓度降低了器件的基极分流电阻,以提供改善的电气粗糙度。 对于IGT,寄生晶闸管动作降低。

    Process for making air bridges for integrated circuits
    3.
    发明授权
    Process for making air bridges for integrated circuits 失效
    集成电路制作空气桥的工艺

    公开(公告)号:US5408742A

    公开(公告)日:1995-04-25

    申请号:US141474

    申请日:1993-10-22

    IPC分类号: H01L23/522 H05K3/02

    摘要: The invention relates to an air bridge and an evaporative process for making air bridges. A first layer of photoresist is patterned to create two openings over the contacts to be connected, separated by a strip of photoresist. The photoresist strip is hard baked to allow it to soften and to cause further cross linking. The softening allows surface tension to reshape the photoresist strip to create a gradually sloping arcuate surface between contact openings upon which a metal layer of nearly constant thickness may be evaporated. A second layer of photoresist is then applied, and patterned to create a single large opening embracing both contacts and the now arcuate hard baked photoresist strip. An arch within the large opening connecting both contacts is formed by evaporation. Excess metal and both photoresist layers are then removed, leaving a novel, arch shaped air bridge.

    摘要翻译: 本发明涉及一种用于制造空气桥的空气桥和蒸发过程。 图案化的第一层光致抗蚀剂在要连接的触点上形成两个开口,由光致抗蚀剂条隔开。 光致抗蚀剂条被硬烘烤以使其软化并进一步交联。 软化允许表面张力重新形成光致抗蚀剂条,以在接触开口之间产生逐渐倾斜的弓形表面,在其上可以蒸发几乎恒定厚度的金属层。 然后施加第二层光致抗蚀剂,并图案化以形成包含两个触点和现在的弧形硬烘烤光刻胶条的单个大开口。 通过蒸发形成连接两个触点的大开口内的拱形。 然后去除过量的金属和两个光致抗蚀剂层,留下一个新颖的拱形空气桥。