公开(公告)号：US4240195A

公开(公告)日：1980-12-23

申请号：US942861

申请日：1978-09-15

申请人： James T. Clemens ,  John D. Cuthbert ,  Frank J. Procyk ,  George M. Trout

发明人： James T. Clemens ,  John D. Cuthbert ,  Frank J. Procyk ,  George M. Trout

IPC分类号： G11C14/00 ,  G11C11/40 ,  H01L21/768 ,  H01L21/82 ,  H01L21/822 ,  H01L21/8242 ,  H01L23/535 ,  H01L27/04 ,  H01L27/06 ,  H01L27/10 ,  H01L27/108 ,  B01J17/00

CPC分类号： H01L27/10844 ,  H01L21/768 ,  H01L23/535 ,  H01L27/10805 ,  H01L2924/0002

摘要： A memory in which each cell comprises an MOS transistor merged with a storage capacitor and in which the cells are arranged to permit adjacent pairs of transistors in a common column to share a common source and the transistors in a common row to share a common gate electrode conductor. The memory uses a first polycrystalline silicon layer which is patterned to provide interconnected storage electrodes and a second polycrystalline silicon layer which is patterned to provide a plurality of stripes to serve as the bit sense lines and a plurality of gate electrodes.

摘要翻译： 一种存储器，其中每个单元包括与存储电容器合并的MOS晶体管，其中所述单元被布置成允许公共列中的相邻晶体管共享公共源，并且共用行中的晶体管共享公共栅电极 导体。 存储器使用图案化以提供互连的存储电极的第一多晶硅层和被图案化以提供多个条纹以用作位感测线和多个栅电极的第二多晶硅层。