公开(公告)号：US20100072459A1

公开(公告)日：2010-03-25

申请号：US12536815

申请日：2009-08-06

申请人： Claude L. BERTIN ,  Thomas RUECKES ,  H. M. MANNING

发明人： Claude L. BERTIN ,  Thomas RUECKES ,  H. M. MANNING

IPC分类号： H01L29/66

CPC分类号： G11C13/0069 ,  B82Y10/00 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/025 ,  G11C23/00 ,  G11C29/02 ,  G11C29/021 ,  G11C29/023 ,  G11C29/028 ,  G11C2013/0042 ,  G11C2013/0054 ,  G11C2213/35 ,  G11C2213/82 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/1776 ,  H03K19/1778 ,  H03K19/17796 ,  Y10S977/94

摘要： Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performance chip implementations and are compatible with low cost CMOS technologies and simple to integrate.

公开(公告)号：US08319205B2

公开(公告)日：2012-11-27

申请号：US12536815

申请日：2009-08-06

申请人： Claude L. Bertin ,  Thomas Rueckes ,  H. M. Manning

发明人： Claude L. Bertin ,  Thomas Rueckes ,  H. M. Manning

IPC分类号： H01L29/66

CPC分类号： G11C13/0069 ,  B82Y10/00 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/025 ,  G11C23/00 ,  G11C29/02 ,  G11C29/021 ,  G11C29/023 ,  G11C29/028 ,  G11C2013/0042 ,  G11C2013/0054 ,  G11C2213/35 ,  G11C2213/82 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/1776 ,  H03K19/1778 ,  H03K19/17796 ,  Y10S977/94

摘要： Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performance chip implementations and are compatible with low cost CMOS technologies and simple to integrate.

公开(公告)号：US20110057717A1

公开(公告)日：2011-03-10

申请号：US12139910

申请日：2008-06-16

申请人： H. M. MANNING ,  Thomas RUECKES ,  Jonathan W. WARD ,  Brent M. SEGAL

发明人： H. M. MANNING ,  Thomas RUECKES ,  Jonathan W. WARD ,  Brent M. SEGAL

IPC分类号： H03K17/74 ,  H03K17/00 ,  H01L21/768

CPC分类号： H01L51/0591 ,  B82Y10/00 ,  G11C13/025 ,  H01L51/0048 ,  Y10S977/943

摘要： Nanotube switching devices having nanotube bridges are disclosed. Two-terminal nanotube switches include conductive terminals extending up from a substrate and defining a void in the substrate. Nantoube articles are suspended over the void or form a bottom surface of a void. The nanotube articles are arranged to permanently contact at least a portion of the conductive terminals. An electrical stimulus circuit in communication with the conductive terminals is used to generate and apply selected waveforms to induce a change in resistance of the device between relatively high and low resistance values. Relatively high and relatively low resistance values correspond to states of the device. A single conductive terminal and a interconnect line may be used. The nanotube article may comprise a patterned region of nanotube fabric, having an active region with a relatively high or relatively low resistance value. Methods of making each device are disclosed.

摘要翻译： 公开了具有纳米管桥的纳米管开关器件。 两端纳米管开关包括从衬底向上延伸并且在衬底中限定空隙的导电端子。 纳米管制品悬浮在空隙上或形成空隙的底部表面。 纳米管制品布置成永久地接触导电端子的至少一部分。 使用与导电端子连通的电刺激电路来产生并施加所选择的波形以引起器件在较高和较低电阻值之间的电阻变化。 相对较高且相对较低的电阻值对应于器件的状态。 可以使用单个导电端子和互连线。 纳米管制品可以包括具有相对较高或相对低的电阻值的有源区的纳米管织物的图案化区域。 公开了制造每个装置的方法。

公开(公告)号：US20090194839A1

公开(公告)日：2009-08-06

申请号：US12273807

申请日：2008-11-19

申请人： Claude L. Bertin ,  Eliodor G. Ghenciu ,  Thomas Rueckes ,  H. M. Manning

发明人： Claude L. Bertin ,  Eliodor G. Ghenciu ,  Thomas Rueckes ,  H. M. Manning

IPC分类号： H01L29/06 ,  H01L21/20

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C13/003 ,  G11C2213/19 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/78 ,  H01L21/8221 ,  H01L23/5256 ,  H01L27/0688 ,  H01L27/1021 ,  H01L27/1203 ,  H01L29/1606 ,  H01L2924/00011 ,  H01L2924/0002 ,  Y10S977/943 ,  H01L2924/00 ,  H01L2224/80001

摘要： A high-density memory array. A plurality of word lines and a plurality of bit lines are arranged to access a plurality of memory cells. Each memory cell includes a first conductive terminal and an article in physical and electrical contact with the first conductive terminal, the article comprising a plurality of nanoscopic particles. A second conductive terminal is in physical and electrical contact with the article. Select circuitry is arranged in electrical communication with a bit line of the plurality of bit lines and one of the first and second conductive terminals. The article has a physical dimension that defines a spacing between the first and second conductive terminals such that the nanotube article is interposed between the first and second conducive terminals. A logical state of each memory cell is selectable by activation only of the bit line and the word line connected to that memory cell.

摘要翻译： 高密度存储阵列。 多个字线和多个位线被布置为访问多个存储单元。 每个存储单元包括第一导电端子和与第一导电端子物理和电接触的制品，所述制品包括多个纳米级颗粒。 第二导电端子与物品物理和电接触。 选择电路布置成与多个位线的位线和第一和第二导电端子之一电连通。 该制品具有限定第一和第二导电端子之间的间隔的物理尺寸，使得纳米管制品插入在第一和第二导电端子之间。 每个存储器单元的逻辑状态仅通过仅连接到该存储器单元的位线和字线的激活来选择。