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1.发明授权公开(公告)号：US06391669B1
公开(公告)日：2002-05-21
申请号：US09598426
申请日：2000-06-21
申请人： Benjamin V. Fasano , Hai P. Longworth , Vincent P. Peterson, III , Anthony L. Plachy , Robert N. Wiggin
发明人： Benjamin V. Fasano , Hai P. Longworth , Vincent P. Peterson, III , Anthony L. Plachy , Robert N. Wiggin
IPC分类号： G01R3104
CPC分类号： H01L22/34 , H05K1/0268 , H05K1/0269 , H05K1/092 , H05K1/116 , H05K3/1225 , H05K3/4061 , H05K3/4614 , H05K3/4638 , H05K2201/096 , H05K2201/09627 , H05K2201/09781 , H05K2203/166 , Y10T29/49004
摘要： Multilayer substrates, are fabricated with the incorporation therein of non-destructive test structures utilized to provide visual and electrical test data to facilitate the ascertainment and assessment of potential electrical interface failures. Furthermore, there are provided embedded structures in multilayer substrates, such as are employed in chip carrier packaging, so as to facilitate electrical testing for via to via alignment and interface layer alignment, and to enable the testing of conductive interface electrical integrity of multilayer electrical devices.
摘要翻译： 制造多层基板，其中结合有非破坏性测试结构，用于提供视觉和电气测试数据，以便于确定和评估潜在的电接口故障。 此外，在多层基板中提供了嵌入式结构，例如用于芯片载体封装，以便于通孔经由对准和界面层对准的电气测试，并且能够测试多层电气设备的导电界面电气完整性 。
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2.发明申请Bump Pad Metallurgy Employing An Electrolytic Cu / Electorlytic Ni / Electrolytic Cu Stack 失效使用电解Cu /电解Ni /电解铜堆栈的Bump Pad冶金公开(公告)号：US20090174045A1
公开(公告)日：2009-07-09
申请号：US11968663
申请日：2008-01-03
IPC分类号： H01L23/495 , H01L21/44
CPC分类号： H01L23/49811 , H01L23/49827 , H01L2924/0002 , H05K3/108 , H05K3/24 , H05K3/243 , H05K3/421 , H05K3/4644 , H05K2201/0341 , H05K2201/0769 , H05K2201/09481 , H05K2201/09563 , H01L2924/00
摘要： An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers.
摘要翻译： 在包含芯，至少一个前金属互连层和至少一个背侧金属互连层的封装基板的每一侧上形成化学镀铜层。 在两个无电镀铜层上涂布光致抗蚀剂，并用光刻图案化。 第一电解Cu部分形成在无电解Cu层的暴露表面上，随后形成电解Ni部分和第二电解Cu部分。 电解Ni部分提供增强的电迁移阻力，而第二电解Cu部分提供用于焊接掩模的粘附层并且用作氧化保护层。 一些第一电解铜可以被光刻装置掩盖，以根据需要阻挡电解Ni部分和第二电解Cu部分的形成。 任选地，电解Ni部分可以直接形成在无电镀Cu层上。
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3.发明授权Underbump metallurgy employing an electrolytic Cu / electorlytic Ni / electrolytic Cu stack 有权使用电解Cu /电解Ni /电解铜叠层的底部衬底冶金公开(公告)号：US08587112B2
公开(公告)日：2013-11-19
申请号：US13453074
申请日：2012-04-23
IPC分类号： H05K3/00
CPC分类号： H01L23/49811 , H01L23/49827 , H01L2924/0002 , H05K3/108 , H05K3/24 , H05K3/243 , H05K3/421 , H05K3/4644 , H05K2201/0341 , H05K2201/0769 , H05K2201/09481 , H05K2201/09563 , H01L2924/00
摘要： An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers.
摘要翻译： 在包含芯，至少一个前金属互连层和至少一个背侧金属互连层的封装基板的每一侧上形成化学镀铜层。 在两个无电镀铜层上涂布光致抗蚀剂，并用光刻图案化。 第一电解Cu部分形成在无电解Cu层的暴露表面上，随后形成电解Ni部分和第二电解Cu部分。 电解Ni部分提供增强的电迁移阻力，而第二电解Cu部分提供用于焊接掩模的粘附层并且用作氧化保护层。 一些第一电解铜可以被光刻装置掩盖，以根据需要阻挡电解Ni部分和第二电解Cu部分的形成。 任选地，电解Ni部分可以直接形成在无电镀Cu层上。
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4.发明授权Bump pad metallurgy employing an electrolytic Cu / electorlytic Ni / electrolytic Cu stack 失效使用电解Cu /电解Ni /电解铜叠层的凸坑冶金公开(公告)号：US08232655B2
公开(公告)日：2012-07-31
申请号：US11968663
申请日：2008-01-03
IPC分类号： H01L23/495 , H01L21/44
CPC分类号： H01L23/49811 , H01L23/49827 , H01L2924/0002 , H05K3/108 , H05K3/24 , H05K3/243 , H05K3/421 , H05K3/4644 , H05K2201/0341 , H05K2201/0769 , H05K2201/09481 , H05K2201/09563 , H01L2924/00
摘要： An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers.
摘要翻译： 在包含芯，至少一个前金属互连层和至少一个背侧金属互连层的封装基板的每一侧上形成化学镀铜层。 在两个无电镀铜层上涂布光致抗蚀剂，并用光刻图案化。 第一电解Cu部分形成在无电解Cu层的暴露表面上，随后形成电解Ni部分和第二电解Cu部分。 电解Ni部分提供增强的电迁移阻力，而第二电解Cu部分提供用于焊接掩模的粘附层并且用作氧化保护层。 一些第一电解铜可以被光刻装置掩盖，以根据需要阻挡电解Ni部分和第二电解Cu部分的形成。 任选地，电解Ni部分可以直接形成在无电镀Cu层上。
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5.发明申请UNDERBUMP METALLURGY EMPLOYING AN ELECTROLYTIC Cu / ELECTORLYTIC Ni / ELECTROLYTIC Cu STACK 有权使用电解铜/电解质镍/电解铜堆栈的金属冶金公开(公告)号：US20120198692A1
公开(公告)日：2012-08-09
申请号：US13453074
申请日：2012-04-23
IPC分类号： H05K3/00
CPC分类号： H01L23/49811 , H01L23/49827 , H01L2924/0002 , H05K3/108 , H05K3/24 , H05K3/243 , H05K3/421 , H05K3/4644 , H05K2201/0341 , H05K2201/0769 , H05K2201/09481 , H05K2201/09563 , H01L2924/00
摘要： An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers.
摘要翻译： 在包含芯，至少一个前金属互连层和至少一个背侧金属互连层的封装基板的每一侧上形成化学镀铜层。 在两个无电镀铜层上涂布光致抗蚀剂，并用光刻图案化。 第一电解Cu部分形成在无电解Cu层的暴露表面上，随后形成电解Ni部分和第二电解Cu部分。 电解Ni部分提供增强的电迁移阻力，而第二电解Cu部分提供用于焊接掩模的粘附层并且用作氧化保护层。 一些第一电解铜可以被光刻装置掩盖，以根据需要阻挡电解Ni部分和第二电解Cu部分的形成。 任选地，电解Ni部分可以直接形成在无电镀Cu层上。
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