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    Fabrication process of a semiconductor device to form ultrafine patterns smaller than resolution limit of exposure apparatus
    1.
    发明授权
    Fabrication process of a semiconductor device to form ultrafine patterns smaller than resolution limit of exposure apparatus 有权
    半导体器件的制造工艺形成比曝光装置的分辨率极限小的超细图案

    公开(公告)号：US07968466B2

    公开(公告)日：2011-06-28

    申请号：US11945547

    申请日：2007-11-27

    申请人： Kenji Ishikawa ,  Hideharu Shido ,  Takeo Nagata ,  Teruo Kurahashi ,  Yasuyoshi Mishima

    发明人： Kenji Ishikawa ,  Hideharu Shido ,  Takeo Nagata ,  Teruo Kurahashi ,  Yasuyoshi Mishima

    IPC分类号： H01L21/311

    CPC分类号： H01L21/823456 ,  H01L21/823468 ,  H01L27/1057 ,  H01L27/10805 ,  H01L27/10873 ,  H01L27/11507

    摘要： A method for fabricating an electron device on a substrate includes the steps of forming a dummy film over the substrate such that the dummy film covers a device region of the substrate and an outer region of the substrate outside the device region, forming a dummy pattern by patterning the dummy film such that the dummy pattern has a first height in the device region and a second height smaller than the first height in the outer region, forming another film over the substrate such that the film covers the dummy pattern in the device region and in the outer region with a shape conformal to a cross-sectional shape of the dummy pattern, and applying an anisotropic etching process acting generally perpendicularly to the substrate such that a surface of the substrate is exposed in the device region and in the outer region.

    摘要翻译： 一种在基板上制造电子器件的方法，包括以下步骤：在衬底上形成虚设膜，使得虚设膜覆盖衬底的器件区域和器件区域外的衬底的外部区域，通过 图案化虚拟膜，使得虚设图案在器件区域中具有第一高度，并且第二高度小于外部区域中的第一高度，在衬底上形成另一膜，使得膜覆盖器件区域中的虚设图案，并且 在外部区域具有与虚设图形的横截面形状一致的形状，以及施加大致垂直于基板的各向异性蚀刻工艺，使得基板的表面暴露在器件区域和外部区域中。

    FABRICATION PROCESS OF A SEMICONDUCTOR DEVICE
    3.
    发明申请
    FABRICATION PROCESS OF A SEMICONDUCTOR DEVICE 有权
    半导体器件的制造工艺

    公开(公告)号：US20080124933A1

    公开(公告)日：2008-05-29

    申请号：US11945547

    申请日：2007-11-27

    申请人： Kenji Ishikawa ,  Hideharu Shido ,  Takeo Nagata ,  Teruo Kurahashi ,  Yasuyoshi Mishima

    发明人： Kenji Ishikawa ,  Hideharu Shido ,  Takeo Nagata ,  Teruo Kurahashi ,  Yasuyoshi Mishima

    IPC分类号： H01L21/8242 ,  H01L21/311

    CPC分类号： H01L21/823456 ,  H01L21/823468 ,  H01L27/1057 ,  H01L27/10805 ,  H01L27/10873 ,  H01L27/11507

    摘要： A method for fabricating an electron device on a substrate includes the steps of forming a dummy film over the substrate such that the dummy film covers a device region of the substrate and an outer region of the substrate outside the device region, forming a dummy pattern by patterning the dummy film such that the dummy patter has a first height in the device region and a second height smaller than the first height in the outer region, forming another film over the substrate such that the film covers the dummy pattern in the device region and in the outer region with a shape conformal to a cross-sectional shape of the dummy pattern, and applying an anisotropic etching process acting generally perpendicularly to the substrate such that a surface of the substrate is exposed in the device region and in the outer region.

    摘要翻译： 一种在基板上制造电子器件的方法，包括以下步骤：在衬底上形成虚设膜，使得虚设膜覆盖衬底的器件区域和器件区域外的衬底的外部区域，通过 图案化虚拟膜，使得虚拟图案在器件区域中具有第一高度，并且第二高度小于外部区域中的第一高度，在衬底上形成另一膜，使得膜覆盖器件区域中的虚设图案，并且 在外部区域具有与虚设图形的横截面形状一致的形状，以及施加大致垂直于基板的各向异性蚀刻工艺，使得基板的表面暴露在器件区域和外部区域中。