公开(公告)号：US09154347B2

公开(公告)日：2015-10-06

申请号：US14239973

申请日：2012-06-29

申请人： Hidekuni Yomo ,  Akihiko Matsuoka ,  Atsushi Maruyama

发明人： Hidekuni Yomo ,  Akihiko Matsuoka ,  Atsushi Maruyama

IPC分类号： H03K5/159 ,  H04L27/01 ,  G06F17/14 ,  H04L25/03

CPC分类号： H04L25/03159 ,  G06F17/142 ,  H04L25/03057 ,  H04L27/01 ,  H04L2025/03414 ,  H04L2025/03541

摘要： An adaptive equalizer capable of suppressing an increase in circuit scale and an increase in operation clock frequency. An adaptive equalizer (100) performs an adaptive equalization process on a time-region signal in a frequency region. A signal converter (200) has: a first wide-bit memory (201) capable of reading/writing a plurality of sample signals; a first register group (202) comprising a plurality of registers capable of accessing the first wide-bit memory (201); a butterfly computation unit group (204) comprising a plurality of butterfly computation units; and a first connection switching unit (203) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units.

摘要翻译： 一种自适应均衡器，其能够抑制电路规模的增加和操作时钟频率的增加。 自适应均衡器（100）对频率区域中的时域信号执行自适应均衡处理。 信号转换器（200）具有：能够读取/写入多个采样信号的第一宽位存储器（201） 第一寄存器组（202），包括能够访问第一宽位存储器（201）的多个寄存器; 蝴蝶计算单元组（204），包括多个蝶形计算单元; 以及用于切换多个寄存器与多个蝶形运算单元之间的连接状态的第一连接切换单元（203）。

公开(公告)号：US08593976B2

公开(公告)日：2013-11-26

申请号：US11814774

申请日：2006-01-25

申请人： Takaaki Kishigami ,  Shutai Okamura ,  Hidekuni Yomo ,  Yoshihito Kawai

发明人： Takaaki Kishigami ,  Shutai Okamura ,  Hidekuni Yomo ,  Yoshihito Kawai

IPC分类号： G08C15/00

CPC分类号： H04B7/04 ,  H04B7/0452 ,  H04B7/0632 ,  H04B7/0697 ,  H04J15/00 ,  H04L1/0003 ,  H04L1/0015 ,  H04L1/1671 ,  H04L1/1867 ,  H04L2001/0093 ,  H04W52/42

摘要： It is an object to provide a wireless base station and a terminal equipment capable of shortening the processing time by not requiring the detection of the spatial correlation coefficient, which is required in general technology, and simplifying the selection process for terminal equipments to be connected to each other in a wireless base station that performs spatial multiplexing transmission to a plurality of terminal equipments and a terminal equipment responding for spatial multiplexing transmission.A terminal equipment 12 includes an interference cancellation capability information data maintaining section 20 that maintains interference cancellation capability information data indicating the interference cancellation capability of the terminal equipment 12 and signals the interference cancellation capability information data to a wireless base station 1. The wireless base station 1 includes a control signal extracting unit 3 and a spatial multiplexing controller 4, and the spatial multiplexing controller 4 selects one or more terminal equipments 12 for spatial multiplexing connection on the basis of the interference cancellation capability information data extracted from a reception signal from the terminal equipment 12.

摘要翻译： 本发明的目的是提供一种能够通过不需要检测通用技术所需的空间相关系数来缩短处理时间的无线基站和终端设备，并且简化与要连接的终端设备的选择处理 在对多个终端设备进行空间复用传输的无线基站和对空间复用传输进行响应的终端设备中，彼此相对。 终端设备12包括干扰消除能力信息数据维护部分20，其维持指示终端设备12的干扰消除能力的干扰消除能力信息数据，并将干扰消除能力信息数据发送给无线基站1.无线基站 1包括控制信号提取单元3和空间多路复用控制器4，并且空间复用控制器4基于从终端的接收信号提取的干扰消除能力信息数据，选择一个或多个用于空间复用连接的终端设备12 设备12。

公开(公告)号：US07966360B2

公开(公告)日：2011-06-21

申请号：US11833030

申请日：2007-08-02

申请人： Hidekuni Yomo ,  Yoshinori Kunieda ,  Yuuri Yamamoto

发明人： Hidekuni Yomo ,  Yoshinori Kunieda ,  Yuuri Yamamoto

IPC分类号： G06F17/10

CPC分类号： H03H17/0657 ,  H03H17/0223 ,  H03H17/0229 ,  H03H17/06 ,  H03H17/0621 ,  H03H2218/085

摘要： An A/D conversion section performs oversampling on an analog signal at a rate M times a symbol rate to convert the analog signal into a digital signal. A FIR filtering section has two delay-element sequences, each with a plurality of delay elements. The two delay-element sequences have different delay directions, i.e., a forward direction and a reverse direction. The delay directions can be switched, and according to a finite impulse response train having such delay-element sequences, a convolutional calculation is performed. A phase determining section determines a phase used in making a decision in a decision section. The decision section makes a decision on a filtered signal using the phase determined in the phase determining section to generate bit data. A digital signal receiving apparatus is thus achieved which determines a phase with a high accuracy without increasing the oversampling number, and performs a fast calculation while having a reduced circuitry scale.

摘要翻译： A / D转换部分以符号速率M倍的模拟信号执行过采样，以将模拟信号转换为数字信号。 FIR滤波部分具有两个具有多个延迟元件的延迟元件序列。 两个延迟元件序列具有不同的延迟方向，即正向和反向。 可以切换延迟方向，并且根据具有这种延迟元件序列的有限脉冲响应列，进行卷积计算。 相位确定部确定在判定部中作出判定所使用的相位。 决定部分使用在相位确定部分中确定的相位来对滤波信号做出决定以产生位数据。 因此，实现了数字信号接收装置，其在不增加过采样数量的情况下确定高精度的相位，并且在具有减小的电路规模的情况下执行快速计算。

公开(公告)号：US07577124B2

公开(公告)日：2009-08-18

申请号：US10942122

申请日：2004-09-16

申请人： Hidekuni Yomo ,  Yoshinori Kunieda ,  Yuuri Yamamoto ,  Yoshihito Kawai

发明人： Hidekuni Yomo ,  Yoshinori Kunieda ,  Yuuri Yamamoto ,  Yoshihito Kawai

IPC分类号： H04Q7/24 ,  H04L12/413

CPC分类号： H04B7/15528 ,  H04L27/2602

摘要： A relay apparatus, terminal apparatus and relay method for relaying signals with a reduced scale of the apparatus, without temporally switching between transmission and reception and with reduced waste of time when relay is performed at the same frequency on a radio communication network on which bidirectional communication is performed. A radio reception section 202 outputs information signals to a switch 208, outputs relay control signals to a demodulation section 204 after subjecting predetermined radio reception processing. The demodulation section 204 demodulates a relay control signal. A relay control signal processing section 206 decides the possibility of relay of information signals and inquires, when the relay is possible, whether the terminal apparatus on the receiving side can receive this information signal or not. Furthermore, the relay control signal processing section 206 connects a switch 208 during the stored relay time. The switch 208 is connected only the information signals to be relayed are received under the control of a relay control section 2063.

摘要翻译： 一种中继装置，终端装置和中继方法，用于在设备的规模缩小的情况下中继信号，而不需要在发送和接收之间进行时间上的切换，并且在双向通信的无线电通信网络上以相同频率执行中继时减少了时间浪费 被执行。 无线接收部202将信息信号输出到开关208，在经过预定的无线接收处理之后，向解调部204输出中继控制信号。 解调部204解调继电器控制信号。 继电器控制信号处理部分206确定信息信号的中继的可能性，并且当继电器可能时，询问接收侧的终端装置是否可以接收该信息信号。 此外，继电器控制信号处理部206在存储的继电器时间期间连接开关208。 在继电器控制部分2063的控制下，开关208只连接待接收的信息信号。

公开(公告)号：US07254598B2

公开(公告)日：2007-08-07

申请号：US10475090

申请日：2003-03-14

申请人： Hidekuni Yomo ,  Yoshinori Kunieda ,  Yuuri Yamamoto

发明人： Hidekuni Yomo ,  Yoshinori Kunieda ,  Yuuri Yamamoto

IPC分类号： G06F17/10

CPC分类号： H03H17/0657 ,  H03H17/0223 ,  H03H17/0229 ,  H03H17/06 ,  H03H17/0621 ,  H03H2218/085

摘要： An A/D conversion section performs oversampling on an analog signal at a rate M times a symbol rate to convert the analog signal into a digital signal. A FIR filtering section has two delay-element sequences, each with a plurality of delay elements. The two delay-element sequences have different delay directions, i.e., a forward direction and a reverse direction. The delay directions can be switched, and according to a finite impulse response train having such delay-element sequences, a convolutional calculation is performed. A phase determining section determines a phase used in making a decision in a decision section. The decision section makes a decision on a filtered signal using the phase determined in the phase determining section to generate bit data. A digital signal receiving apparatus is thus achieved which determines a phase with a high accuracy without increasing the oversampling number, and performs a fast calculation while having a reduced circuitry scale.

摘要翻译： A / D转换部分对符号率M倍的模拟信号进行过采样，以将模拟信号转换为数字信号。 FIR滤波部分具有两个具有多个延迟元件的延迟元件序列。 两个延迟元件序列具有不同的延迟方向，即正向和反向。 可以切换延迟方向，并且根据具有这种延迟元件序列的有限脉冲响应列，进行卷积计算。 相位确定部确定在判定部中作出判定所使用的相位。 决定部分使用在相位确定部分中确定的相位来对滤波信号做出决定以产生位数据。 因此，实现了数字信号接收装置，其在不增加过采样数量的情况下确定高精度的相位，并且在具有减小的电路规模的情况下执行快速计算。

公开(公告)号：US20070110105A1

公开(公告)日：2007-05-17

申请号：US10577484

申请日：2004-10-26

申请人： Izumi Usuki ,  Sadashi Kageyama ,  Akira Kisoda ,  Hidekuni Yomo

发明人： Izumi Usuki ,  Sadashi Kageyama ,  Akira Kisoda ,  Hidekuni Yomo

IPC分类号： H04H1/04

CPC分类号： H04H20/26 ,  H04H20/33 ,  H04H60/12 ,  H04N21/2365 ,  H04N21/4347 ,  H04N21/4383 ,  H04N21/4384 ,  H04N21/64315

摘要： In communication transmitting a first stream (intermittent data portion) for burst transmission of packet sets and a second stream (continuous data portion) for transmitting packets at a speed determined by the transmission rate required for the service, the second stream related to the selected service is received and reproduced for the selected service when a service is selected until intermittent data transmitted in the first stream can be received, and reception and playback of the first stream begins when transmission of the intermittent data for the selected service in the first stream begins.

摘要翻译： 在通信中发送用于分组集合的突发传输的第一流（间歇数据部分）和用于以由服务所需的传输速率确定的速度发送分组的第二流（连续数据部分），与所选服务相关的第二流 当选择服务直到在第一流中发送的间歇数据可以被接收为止为止，对所选择的服务进行接收和再现，并且当第一流中所选择的服务的间歇数据的传输开始时，第一流的接收和重放开始。

公开(公告)号：US09301297B2

公开(公告)日：2016-03-29

申请号：US13881292

申请日：2011-10-26

申请人： Hidekuni Yomo ,  Kiyotaka Kobayashi ,  Akihiko Matsuoka ,  Atsushi Maruyama

发明人： Hidekuni Yomo ,  Kiyotaka Kobayashi ,  Akihiko Matsuoka ,  Atsushi Maruyama

IPC分类号： H04W72/04 ,  H04B1/403 ,  H04B1/00 ,  H04W88/06

CPC分类号： H04W72/0446 ,  H04B1/0003 ,  H04B1/406 ,  H04W88/06

摘要： A communication processor that is compatible with a plurality of communication protocols while limiting increases in circuit scale is provided. The communication processor includes a computational processing circuit resource having a plurality of programmable function units (FUs). An operation mode determination unit determines an operation mode indicating a communication protocol application state. A permitted processing time determination unit determines a permitted processing time in accordance with the determined operation mode. In accordance with the permitted processing time, a resource allocation unit divides the plurality of FUs and allocates computational resources for each communication protocol indicated by the operation mode. A region controller controls the allocated computation resources. The computational processing circuit resource outputs data from after the computational processing at the timing when the computation processing ends.

摘要翻译： 提供了在限制电路规模增加的同时与多个通信协议兼容的通信处理器。 通信处理器包括具有多个可编程功能单元（FU）的计算处理电路资源。 操作模式确定单元确定指示通信协议应用状态的操作模式。 允许处理时间确定单元根据确定的操作模式确定允许的处理时间。 根据允许的处理时间，资源分配单元对多个FU进行划分，并为由操作模式指示的每个通信协议分配计算资源。 区域控制器控制分配的计算资源。 计算处理电路资源在计算处理结束的定时从计算处理之后输出数据。

公开(公告)号：US08755358B2

公开(公告)日：2014-06-17

申请号：US13177716

申请日：2011-07-07

申请人： Takaaki Kishigami ,  Hidekuni Yomo

发明人： Takaaki Kishigami ,  Hidekuni Yomo

IPC分类号： H04W4/00 ,  H04J3/16

CPC分类号： H04B7/0695 ,  H04B7/0697 ,  H04W52/42

摘要： A wireless base station device includes a plurality of transmit weight generation sections and a beam selection section. The transmit weight generation sections generate pieces of transmit weight information used for spatial division multiplexing transmission according to different algorithms. The pieces of transmit weight information are generated based on channel information on a plurality of terminals each having one or more antennas with which the wireless base station device performs spatial division multiplexing transmission. The beam selection section selects one of the pieces of transmit weight information generated.

摘要翻译： 无线基站装置包括多个发送权重生成部和波束选择部。 发送权重生成部根据不同的算法生成用于空分多路传输的发送权重信息。 发送权重信息是基于各自具有无线基站装置进行空分复用发送的一个以上的天线的多个终端的信道信息生成的。 波束选择部选择生成的发送权重信息之一。

公开(公告)号：US08724651B2

公开(公告)日：2014-05-13

申请号：US12063821

申请日：2006-08-25

申请人： Hidekuni Yomo ,  Naoki Adachi ,  Takaaki Kishigami ,  Yoichi Nakagawa ,  Shutai Okamura

发明人： Hidekuni Yomo ,  Naoki Adachi ,  Takaaki Kishigami ,  Yoichi Nakagawa ,  Shutai Okamura

IPC分类号： H04L12/43

CPC分类号： H04W74/0808

摘要： A wireless network system including a first terminal for sending a request-to-send signal including information on a medium use period to a second terminal before sending data, receiving a clear-to-send signal from the second terminal, and sending data to the second terminal during the medium use period; the second terminal for receiving the request-to-send signal and sending the clear-to-send signal; a third terminal for receiving the request-to-send signal and transmitting data to a fourth terminal during the medium use period; and the fourth terminal. Thus, it is possible to prevent occurrence of a problem that when it is judged that the wireless channel is being used, transmission of the station is suppressed.

摘要翻译： 一种无线网络系统，包括：第一终端，用于在发送数据之前向第二终端发送包括关于中间使用周期的信息的请求发送信号，从所述第二终端接收清除发送信号，以及向所述第二终端发送数据 中期使用期间第二个终端; 所述第二终端用于接收所述请求发送信号并发送所述清除发送信号; 第三终端，用于在所述媒体使用期间内接收所述请求发送信号并向第四终端发送数据; 和第四个终端。 因此，可以防止当判断为正在使用无线信道时抑制站的发送的问题的发生。

公开(公告)号：US08265206B2

公开(公告)日：2012-09-11

申请号：US12667579

申请日：2008-07-03

申请人： Hirohito Mukai ,  Hidekuni Yomo ,  Kiyotaka Kobayashi ,  Yoshinori Kunieda

发明人： Hirohito Mukai ,  Hidekuni Yomo ,  Kiyotaka Kobayashi ,  Yoshinori Kunieda

IPC分类号： H04L27/08

CPC分类号： H04L1/0048 ,  H04L1/0025 ,  H04L1/005 ,  H04L1/06 ,  H04L25/0204 ,  H04L25/0224 ,  H04L25/03006 ,  H04L25/03171

摘要： A radio receiver which performs iterative decoding of a received signal is provided. The radio receiver comprises: a receiving unit receiving a signal on a symbol-by-symbol basis; a demodulation unit (303) demodulating the received signal; a last symbol timing generation unit (308) generating a last symbol timing signal on the basis of the signal demodulated by the demodulation unit (303); a modulation unit (304) modulating the signal demodulated by the demodulation unit (303); and a cancellation unit (306) cancelling an interference component of the received signal using a replica signal generated on the basis of the signal modulated by the modulation unit (304). The modulation unit (304) controls the timing of rearrangement of a data sequence on the basis of the timing of the last symbol. Thus, a radio receiver in which the receiving processing time is reduced can be provided.

摘要翻译： 提供对接收信号执行迭代解码的无线电接收机。 无线电接收机包括：接收单元，以符号为单位接收信号; 解调单元（303），对接收到的信号进行解调; 最后符号定时生成单元，基于由解调单元解调的信号生成最后的符号定时信号; 调制单元（304），调制由解调单元（303）解调的信号; 以及消除单元（306），使用基于由调制单元（304）调制的信号生成的复制信号来消除接收信号的干扰分量。 调制单元（304）基于最后一个符号的定时来控制数据序列的重排的定时。 因此，可以提供其中接收处理时间减少的无线电接收机。