FORMATION OF A TRENCH SILICIDE
    1.
    发明申请
    FORMATION OF A TRENCH SILICIDE 审中-公开
    形成硅胶

    公开(公告)号:US20130270614A1

    公开(公告)日:2013-10-17

    申请号:US13448513

    申请日:2012-04-17

    申请人: Hiroyuki Yamasaki

    发明人: Hiroyuki Yamasaki

    摘要: Systems and methods are presented for controlling formation of a silicide region. A selective etch layer is utilized to control formation of a trench opening, and further can be utilized to open up a trench to facilitate correct exposure of an active Si region to subsequently form a silicide. Issues regarding over-dimension, under-dimension, and misalignment of a trench are addressed. The selective etch material is chosen to facilitate control of the trench formation and also to enable removal of the selective etch layer without affecting any adjacent structures/material. The selective etch layer can be an oxide, for example aluminum oxide, Al2O3. The selective etch layer can be utilized to prevent formation of silicide in a channel beneath a raised source/drain.

    摘要翻译: 呈现用于控制硅化物区域的形成的系统和方法。 使用选择性蚀刻层来控制沟槽开口的形成,并且还可以用于打开沟槽以促进有源Si区域的正确曝光以随后形成硅化物。 关于沟槽尺寸过大,尺寸不合格和未对准的问题得到了解决。 选择性蚀刻材料被选择以便于控制沟槽形成,并且还能够去除选择性蚀刻层而不影响任何相邻的结构/材料。 选择性蚀刻层可以是氧化物,例如氧化铝,Al 2 O 3。 选择性蚀刻层可用于防止在升高的源极/漏极下方的沟道中形成硅化物。

    TRANSISTOR STRUCTURE AND MANUFACTURING METHOD WHICH HAS CHANNEL EPITAXIAL EQUIPPED WITH LATERAL EPITAXIAL STRUCTURE
    2.
    发明申请
    TRANSISTOR STRUCTURE AND MANUFACTURING METHOD WHICH HAS CHANNEL EPITAXIAL EQUIPPED WITH LATERAL EPITAXIAL STRUCTURE 审中-公开
    具有侧向外延结构的通道外形的晶体管结构和制造方法

    公开(公告)号:US20120241866A1

    公开(公告)日:2012-09-27

    申请号:US13070561

    申请日:2011-03-24

    申请人: Hiroyuki Yamasaki

    发明人: Hiroyuki Yamasaki

    IPC分类号: H01L29/772 H01L21/336

    摘要: A semiconductor device and methods of fabricating semiconductor devices are provided. Provided is an epitaxial layer equipped with a lateral epitaxial layer that can block a Shallow Trench Isolation (STI) edge from a downstream etching process step, which can result in a reduced STI divot. A method involves forming a semiconductor substrate on a source region and a drain region and forming a semiconductor region on the semiconductor substrate. The method also comprises creating at least a first isolation feature adjacent to the semiconductor region and depositing an epitaxial layer on the semiconductor region and laterally between the semiconductor region and the at least the first isolation feature.

    摘要翻译: 提供半导体器件和制造半导体器件的方法。 提供了一种外延层,其具有可以从下游蚀刻工艺步骤阻挡浅沟槽隔离(STI)边缘的横向外延层,这可能导致STI纹路减小。 一种方法包括在源区和漏区上形成半导体衬底,并在半导体衬底上形成半导体区。 该方法还包括至少创建与半导体区域相邻的第一隔离特征,并在半导体区域上以及在半导体区域与至少第一隔离特征之间横向地沉积外延层。

    Optical head and optical head device
    3.
    发明授权
    Optical head and optical head device 失效
    光头和光头设备

    公开(公告)号:US07489617B2

    公开(公告)日:2009-02-10

    申请号:US11489484

    申请日:2006-07-20

    IPC分类号: G11B7/00

    摘要: An optical head which has a prism with an incident section, an internal reflective surface and an emergent surface, and an optical head device which employs the optical head. Light emitted from a light source is incident to the prism through the incident section, reflects at least once on the internal reflective surface and is converged in the vicinity of the emergent surface. Then, the light effuses through the emergent surface as near field light.

    摘要翻译: 具有入射部分的棱镜,内部反射表面和出射表面的光学头,以及使用该光学头的光学头装置。 从光源发射的光通过入射部入射到棱镜,至少在内反射面上反射一次并会聚到出射面附近。 然后,光通过出射表面流过近场光。

    Semiconductor device having a shaped gate electrode and method of manufacturing the same
    4.
    发明授权
    Semiconductor device having a shaped gate electrode and method of manufacturing the same 失效
    具有成形栅电极的半导体器件及其制造方法

    公开(公告)号:US07394120B2

    公开(公告)日:2008-07-01

    申请号:US11146029

    申请日:2005-06-07

    IPC分类号: H01L29/78

    摘要: An MIS transistor includes a gate electrode located to intersect a device region of a semiconductor substrate isolated by a device isolation region, and source and drain regions formed in the semiconductor substrate at both sides of the gate electrode region and elevated source and drain located above the source and drain regions. A gate length of the gate electrode at a boundary between the device isolation region and the device region is longer than the gate length at a central portion of the device region.

    摘要翻译: MIS晶体管包括位于与器件隔离区隔离的半导体衬底的器件区域相交的栅电极,以及形成在栅电极区两侧的半导体衬底中的源区和漏区以及位于 源极和漏极区域。 在器件隔离区域和器件区域之间的边界处的栅电极的栅极长度大于器件区域的中心部分处的栅极长度。

    Semiconductor device and method of manufacturing the same
    6.
    发明申请
    Semiconductor device and method of manufacturing the same 审中-公开
    半导体装置及其制造方法

    公开(公告)号:US20060071260A1

    公开(公告)日:2006-04-06

    申请号:US11235063

    申请日:2005-09-27

    申请人: Hiroyuki Yamasaki

    发明人: Hiroyuki Yamasaki

    IPC分类号: H01L21/8242 H01L29/94

    CPC分类号: H01L29/945 H01L27/10867

    摘要: A semiconductor device includes a semiconductor substrate, an insulating film provided on the semiconductor substrate, the insulating film including an opening portion, a surface strap embedded in the opening portion, the surface strap comprising a semiconductor layer, a reaction preventing film provided on the surface strap, the reaction preventing film comprising a material different from that of the insulating film, a storage electrode of a trench capacitor provided in the semiconductor substrate, the storage electrode connecting electrically with the surface strap, and a source/drain region provided on a surface of the semiconductor substrate, the source/drain region connecting electrically with the storage electrode via the surface strap.

    摘要翻译: 半导体器件包括半导体衬底,设置在半导体衬底上的绝缘膜,绝缘膜包括开口部分,嵌入在开口部分中的表面带,表面带包括半导体层,反应防止膜设置在表面上 带,反应防止膜包括与绝缘膜不同的材料,设置在半导体衬底中的沟槽电容器的存储电极,与表面带电连接的存储电极和设置在表面上的源极/漏极区域 所述源极/漏极区域经由所述表面带与所述存储电极电连接。

    Pinch roller and pinch roller apparatus
    7.
    发明授权
    Pinch roller and pinch roller apparatus 失效
    夹送辊和夹送辊装置

    公开(公告)号:US06769642B2

    公开(公告)日:2004-08-03

    申请号:US10115944

    申请日:2002-04-05

    IPC分类号: G11B1532

    摘要: A pinch roller which includes a cylindrical elastic body formed of a polymer blend including acrylonitrile butadiene copolymer rubber (NBR), and at least one of a highly saturated copolymer rubber containing nitrile group obtained by hydrogenating a butadiene part of said acrylonitrile-butadiene copolymer rubber, and ethylene-&agr;-olefin type copolymer rubber, and a resin sleeve press-fitted in the elastic body. The elongation of the elastic body is set to be at least 5% and not more than 15%. A pinch roller apparatus includes this pinch roller.

    摘要翻译: 一种夹送辊,其包括由包含丙烯腈丁二烯共聚物橡胶(NBR)的聚合物共混物形成的圆柱形弹性体和通过氢化所述丙烯腈 - 丁二烯共聚物橡胶的丁二烯部分获得的含有腈基的高度饱和的共聚物橡胶中的至少一种, 和乙烯-α-烯烃型共聚物橡胶,以及压配在弹性体中的树脂套筒。 弹性体的伸长率设定为5%以上且15%以下。 夹送辊装置包括该夹送辊。

    Integrated magnetoresistive sensor fabrication method and apparatus
    9.
    发明授权
    Integrated magnetoresistive sensor fabrication method and apparatus 失效
    集成磁阻传感器制造方法和装置

    公开(公告)号:US5486804A

    公开(公告)日:1996-01-23

    申请号:US161021

    申请日:1993-12-03

    CPC分类号: H01L43/12 H01L27/22

    摘要: A magnetoresistor is monolithically integrated with an active circuit by growing a thin film magnetoresistor on a semiconductor substrate after the substrate has been doped and annealed for the active devices. The magnetoresistor is grown through a window in a mask, with the mask and magnetoresistor materials selected such that the magnetoresistor is substantially non-adherent to the mask. InSb is preferred for the magnetoresistor, Si.sub.3 N.sub.4 for the mask and GaAs for the substrate. The non-adherence allows the mask to be substantially thinner than the magnetoresistor without impairing the removal of the mask after the magnetoresistor has been established.

    摘要翻译: 在将衬底掺杂并退火用于有源器件之后,通过在半导体衬底上生长薄膜磁阻电阻器,将磁敏电阻器与有源电路单片集成。 磁阻电阻器通过掩模中的窗口生长,其中掩模和磁电阻材料被选择为使得磁阻器基本上与掩模不粘附。 InSb优选用于磁电阻,用于掩模的Si 3 N 4和用于衬底的GaAs。 非粘附性允许掩模在磁阻电阻器建立之后基本上比磁敏电阻器薄,而不会损害掩模的去除。

    Random access memory with reduced access time in reading operation and
operating method thereof
    10.
    发明授权
    Random access memory with reduced access time in reading operation and operating method thereof 失效
    随机存取存储器,其读取操作的访问时间减少及其操作方法

    公开(公告)号:US4984206A

    公开(公告)日:1991-01-08

    申请号:US372441

    申请日:1989-06-27

    摘要: A dynamic random access memory comprises a pair of write-in data transferring lines (IL, IL), a pair of read-out data transferring lines (OL, OL) and a current-mirror type sense amplifier comprising (30) CMOS transistors. The current-mirror type amplifier (30) is connected between a plurality of bit line pairs (BL, BL) and the pair of read-out data transferring lines (OL, OL). At the time of data reading, the pair of write-in data transferring lines (IL, IL) is connected to the corresponding bit line pair (BL, BL) in response to a write-in column decoded signal (YW) obtained by ANDing a column decoded signal (CA) with a write-in instruction signal (W).

    摘要翻译: 动态随机存取存储器包括一对写入数据传输线(IL,& Upbar&I),一对读出数据传输线(OL,& upbar&O)和电流镜型读出放大器,包括(30)CMOS 晶体管。 电流镜式放大器(30)连接在多个位线对(BL,& B和B)与一对读出数据传输线(OL,& upbar&O)之间。 在数据读取时,响应于获得的写入列解码信号(YW),一对写入数据传输线(IL,& upbar&I)被连接到对应的位线对(BL,& B和B) 通过将列解码信号(CA)与写入指令信号(W)进行AND运算。