公开(公告)号：US09356123B2

公开(公告)日：2016-05-31

申请号：US14355137

申请日：2013-06-06

申请人： Huijuan Zhang

发明人： Huijuan Zhang

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L29/66 ,  H01L21/02 ,  H01L29/786 ,  H01L21/265 ,  H01L21/324

CPC分类号： H01L29/66765 ,  H01L21/02043 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/265 ,  H01L21/324 ,  H01L29/66757 ,  H01L29/78675

摘要： A manufacturing method of a low temperature polycrystalline silicon thin film and a manufacturing method of a thin film transistor are provided. The manufacturing method of the low temperature polycrystalline silicon thin film comprises: forming an amorphous silicon thin film on a substrate; and performing a rapid thermal annealing (RTA) process on the amorphous silicon thin film for several times at a predetermined temperature to form the low temperature polycrystalline silicon thin film, wherein the predetermined temperature is lower than a conventional RTA crystallization temperature.

摘要翻译： 提供了低温多晶硅薄膜的制造方法和薄膜晶体管的制造方法。 低温多晶硅薄膜的制造方法包括：在基板上形成非晶硅薄膜; 并在预定温度下对非晶硅薄膜进行几次快速热退火（RTA）处理以形成低温多晶硅薄膜，其中预定温度低于传统的RTA结晶温度。

公开(公告)号：US20150155369A1

公开(公告)日：2015-06-04

申请号：US14355137

申请日：2013-06-06

申请人： Huijuan Zhang

发明人： Huijuan Zhang

IPC分类号： H01L29/66 ,  H01L21/324 ,  H01L21/265 ,  H01L21/02

CPC分类号： H01L29/66765 ,  H01L21/02043 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/265 ,  H01L21/324 ,  H01L29/66757 ,  H01L29/78675

摘要： A manufacturing method of a low temperature polycrystalline silicon thin film and a manufacturing method of a thin film transistor are provided. The manufacturing method of the low temperature polycrystalline silicon thin film comprises: forming an amorphous silicon thin film on a substrate; and performing a rapid thermal annealing (RTA) process on the amorphous silicon thin film for several times at a predetermined temperature to form the low temperature polycrystalline silicon thin film, wherein the predetermined temperature is lower than a conventional RTA crystallization temperature.

摘要翻译： 提供了低温多晶硅薄膜的制造方法和薄膜晶体管的制造方法。 低温多晶硅薄膜的制造方法包括：在基板上形成非晶硅薄膜; 并在预定温度下对非晶硅薄膜进行几次快速热退火（RTA）处理以形成低温多晶硅薄膜，其中预定温度低于传统的RTA结晶温度。

公开(公告)号：US20120294568A1

公开(公告)日：2012-11-22

申请号：US13475008

申请日：2012-05-18

申请人： Jing Zhang ,  Jeong Hwan Song ,  Huijuan Zhang ,  Shiyi Chen

发明人： Jing Zhang ,  Jeong Hwan Song ,  Huijuan Zhang ,  Shiyi Chen

IPC分类号： G02B6/42

CPC分类号： G02B6/4234 ,  B82Y20/00 ,  G02B6/1223 ,  G02B6/1228 ,  G02B6/30 ,  G02B6/34 ,  G02B6/4225 ,  G02B2006/12061 ,  G02B2006/12107 ,  G02B2006/12152

摘要： According to embodiments of the present invention, an alignment method for a silicon photonics packaging is provided. The method includes providing a plurality of waveguides, each of the plurality of waveguides including an input and an output, arranging a light source relative to the plurality of waveguides, the light source being configured to provide an input light to the input of at least one of the plurality of waveguides, detecting respective output light intensity exiting the outputs of the plurality of waveguides, and identifying based on the detected output light intensity a selected waveguide of the plurality of waveguides for subsequent coupling.

摘要翻译： 根据本发明的实施例，提供了一种用于硅光子学封装的对准方法。 该方法包括提供多个波导，多个波导中的每一个包括输入和输出，相对于多个波导布置光源，所述光源被配置为向至少一个波导的输入提供输入光 检测多个波导中离开多个波导的输出光强度的各个输出光强度，以及基于所检测的输出光强度来识别多个波导的选定波导以用于随后的耦合。

公开(公告)号：US20070055953A1

公开(公告)日：2007-03-08

申请号：US11510415

申请日：2006-08-25

申请人： Weiping Fang ,  Huijuan Zhang ,  Yibing Wang ,  Zongwu Tang

发明人： Weiping Fang ,  Huijuan Zhang ,  Yibing Wang ,  Zongwu Tang

IPC分类号： G06F17/50 ,  G06K9/00

CPC分类号： G03F1/36 ,  G03F1/68

摘要： A system that verifies a simulated wafer image against an intended design. During operation, the system receives a design. Next, the system generates a skeleton from the design, wherein the skeleton specifies cell placements and associated bounding boxes for the cell placements, but does not include geometries for the cell placements. The system then computes environments for cell placements based on the skeleton. Next, the system generates templates for cell placements, wherein a template for a cell placement specifies the cell placement and the environment surrounding the cell placement. The system then generates the simulated wafer image by performing model-based simulations for cell placements associated with unique templates.

摘要翻译： 根据预期设计验证模拟晶片图像的系统。 在运行过程中，系统接收到一个设计。 接下来，系统从设计生成骨架，其中骨架指定单元格展示位置的单元格展示位置和相关联的边界框，但不包括单元格展示位置的几何。 然后系统基于骨架计算单元格展示位置的环境。 接下来，系统生成单元格展示位置的模板，其中单元格展示位置的模板指定单元格展示位置和单元格展示位置周围的环境。 然后，系统通过对与唯一模板相关联的单元格展示执行基于模型的模拟来生成模拟的晶片图像。

公开(公告)号：US07496884B2

公开(公告)日：2009-02-24

申请号：US11510415

申请日：2006-08-25

申请人： Weiping Fang ,  Huijuan Zhang ,  Yibing Wang ,  Zongwu Tang

发明人： Weiping Fang ,  Huijuan Zhang ,  Yibing Wang ,  Zongwu Tang

IPC分类号： G06F17/50

CPC分类号： G03F1/36 ,  G03F1/68

摘要： A system that verifies a simulated wafer image against an intended design. During operation, the system receives a design. Next, the system generates a skeleton from the design, wherein the skeleton specifies cell placements and associated bounding boxes for the cell placements, but does not include geometries for the cell placements. The system then computes environments for cell placements based on the skeleton. Next, the system generates templates for cell placements, wherein a template for a cell placement specifies the cell placement and the environment surrounding the cell placement. The system then generates the simulated wafer image by performing model-based simulations for cell placements associated with unique templates.

摘要翻译： 根据预期设计验证模拟晶片图像的系统。 在运行过程中，系统接收到一个设计。 接下来，系统从设计生成骨架，其中骨架指定单元格展示位置的单元格展示位置和相关联的边界框，但不包括单元格展示位置的几何。 然后系统基于骨架计算单元格展示位置的环境。 接下来，系统生成单元格展示位置的模板，其中单元格展示位置的模板指定单元格展示位置和单元格展示位置周围的环境。 然后，系统通过对与唯一模板相关联的单元格展示执行基于模型的模拟来生成模拟的晶片图像。