公开(公告)号：US08330218B2

公开(公告)日：2012-12-11

申请号：US12870913

申请日：2010-08-30

申请人： Jong-ho Park ,  Hyi-Jeong Park ,  Hye-mi Kim ,  Chang-Ki Jeon

发明人： Jong-ho Park ,  Hyi-Jeong Park ,  Hye-mi Kim ,  Chang-Ki Jeon

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L21/8249 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/7809 ,  H01L29/7812

摘要： Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first conductive type well is formed; a first conductive type gate electrode formed on the semiconductor substrate with a gate insulating layer intervening between the gate electrode and the semiconductor substrate; a second conductive type body electrode formed on the semiconductor substrate and separated from the gate electrode; a first conductive type drain electrode formed on the semiconductor substrate and separated from the gate electrode and the body electrode; a second conductive type first body region formed in the well under the body electrode; a second conductive type second body region extending from the first body region to the gate insulating layer and formed in the well; a first conductive type source region formed in the second body region and extending from the first body region to the gate insulating layer; and a first conductive type source electrode extending from the source region to surround the gate electrode on the semiconductor substrate with an insulating layer intervening between the source electrode and gate electrode.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 使用DMOS器件的半导体器件包括：形成第一导电型阱的半导体衬底; 形成在所述半导体衬底上的第一导电型栅极电极，所述栅极绝缘层介于所述栅电极和所述半导体衬底之间; 形成在所述半导体基板上并与所述栅电极分离的第二导电型体电极; 形成在所述半导体基板上并与所述栅电极和所述主体电极分离的第一导电型漏电极; 形成在所述体电极下方的所述阱内的第二导电型第一体区域; 第二导电类型的第二主体区域，其从所述第一主体区域延伸到所述栅极绝缘层并形成在所述阱中; 形成在所述第二主体区域中并从所述第一主体区域延伸到所述栅极绝缘层的第一导电型源极区域; 以及第一导电型源电极，其从所述源极区域延伸，以在所述半导体衬底上围绕所述栅极电极，所述绝缘层介于所述源电极和栅电极之间。

公开(公告)号：US20100320537A1

公开(公告)日：2010-12-23

申请号：US12870913

申请日：2010-08-30

申请人： Jong-ho Park ,  Chang-ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

发明人： Jong-ho Park ,  Chang-ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

IPC分类号： H01L27/06 ,  H01L29/78

CPC分类号： H01L21/8249 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/7809 ,  H01L29/7812

摘要： Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first conductive type well is formed; a first conductive type gate electrode formed on the semiconductor substrate with a gate insulating layer intervening between the gate electrode and the semiconductor substrate; a second conductive type body electrode formed on the semiconductor substrate and separated from the gate electrode; a first conductive type drain electrode formed on the semiconductor substrate and separated from the gate electrode and the body electrode; a second conductive type first body region formed in the well under the body electrode; a second conductive type second body region extending from the first body region to the gate insulating layer and formed in the well; a first conductive type source region formed in the second body region and extending from the first body region to the gate insulating layer; and a first conductive type source electrode extending from the source region to surround the gate electrode on the semiconductor substrate with an insulating layer intervening between the source electrode and gate electrode.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 使用DMOS器件的半导体器件包括：形成第一导电型阱的半导体衬底; 形成在所述半导体衬底上的第一导电型栅极电极，所述栅极绝缘层介于所述栅电极和所述半导体衬底之间; 形成在所述半导体基板上并与所述栅电极分离的第二导电型体电极; 形成在所述半导体基板上并与所述栅电极和所述主体电极分离的第一导电型漏电极; 形成在所述体电极下方的所述阱内的第二导电型第一体区域; 第二导电类型的第二主体区域，其从所述第一主体区域延伸到所述栅极绝缘层并形成在所述阱中; 形成在所述第二主体区域中并从所述第一主体区域延伸到所述栅极绝缘层的第一导电型源极区域; 以及第一导电型源电极，其从所述源极区域延伸，以在所述半导体衬底上围绕所述栅极电极，所述绝缘层介于所述源电极和栅电极之间。

公开(公告)号：US20090250753A1

公开(公告)日：2009-10-08

申请号：US12414172

申请日：2009-03-30

申请人： Jong-ho Park ,  Chang-Ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

发明人： Jong-ho Park ,  Chang-Ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

IPC分类号： H01L29/78 ,  H01L27/06 ,  H01L21/336 ,  H01L21/8249

CPC分类号： H01L21/8249 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/7809 ,  H01L29/7812

摘要： Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first conductive type well is formed; a first conductive type gate electrode formed on the semiconductor substrate with a gate insulating layer intervening between the gate electrode and the semiconductor substrate; a second conductive type body electrode formed on the semiconductor substrate and separated from the gate electrode; a first conductive type drain electrode formed on the semiconductor substrate and separated from the gate electrode and the body electrode; a second conductive type first body region formed in the well under the body electrode; a second conductive type second body region extending from the first body region to the gate insulating layer and formed in the well; a first conductive type source region formed in the second body region and extending from the first body region to the gate insulating layer; and a first conductive type source electrode extending from the source region to surround the gate electrode on the semiconductor substrate with an insulating layer intervening between the source electrode and gate electrode.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 使用DMOS器件的半导体器件包括：形成第一导电型阱的半导体衬底; 形成在所述半导体衬底上的第一导电型栅极电极，所述栅极绝缘层介于所述栅电极和所述半导体衬底之间; 形成在所述半导体基板上并与所述栅电极分离的第二导电型体电极; 形成在所述半导体基板上并与所述栅电极和所述主体电极分离的第一导电型漏电极; 形成在所述体电极下方的所述阱内的第二导电型第一体区域; 第二导电类型的第二主体区域，其从所述第一主体区域延伸到所述栅极绝缘层并形成在所述阱中; 形成在所述第二主体区域中并从所述第一主体区域延伸到所述栅极绝缘层的第一导电型源极区域; 以及第一导电型源电极，其从所述源极区域延伸，以在所述半导体衬底上围绕所述栅极电极，所述绝缘层介于所述源电极和栅电极之间。

公开(公告)号：US08242007B2

公开(公告)日：2012-08-14

申请号：US12401693

申请日：2009-03-11

申请人： Jong-ho Park ,  Chang-ki Jeon ,  Hyi-jeong Park

发明人： Jong-ho Park ,  Chang-ki Jeon ,  Hyi-jeong Park

IPC分类号： H01L27/06 ,  H01L21/60

CPC分类号： H01L21/8249 ,  H01L21/2256 ,  H01L21/823814 ,  H01L27/0623

摘要： Provided are a semiconductor device including a source/drain and a gate formed using a doped polysilicon process, and a method of fabricating the semiconductor device. The method comprises: forming a gate insulating layer on a part of an active region on a first conductivity type epitaxial layer; forming a conductive layer on the epitaxial layer; implanting high concentration impurities of a second conductivity type a first portion of the conductive layer on the gate insulating layer and second portions of the conductive layer on both sides of the first insulating layer; patterning the conductive layer; forming a second insulating layer on the epitaxial layer and high concentration impurity regions of the second conductivity type below the second conductive pattern; and implanting low-concentration impurities of the second conductivity type into the epitaxial layer between a gate structure and the high concentration impurity regions.

摘要翻译： 提供了包括使用掺杂多晶硅工艺形成的源极/漏极和栅极的半导体器件，以及制造半导体器件的方法。 该方法包括：在第一导电型外延层的有源区的一部分上形成栅极绝缘层; 在外延层上形成导电层; 将第二导电类型的高浓度杂质注入到第一绝缘层的栅绝缘层上的导电层的第一部分和导电层的第二部分上; 图案化导电层; 在所述外延层上形成第二绝缘层，在所述第二导电图案之下形成所述第二导电类型的高浓度杂质区; 以及将第二导电类型的低浓度杂质注入到栅极结构和高浓度杂质区之间的外延层中。

公开(公告)号：US07803676B2

公开(公告)日：2010-09-28

申请号：US12414172

申请日：2009-03-30

申请人： Jong-ho Park ,  Chang-Ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

发明人： Jong-ho Park ,  Chang-Ki Jeon ,  Hyi-Jeong Park ,  Hye-mi Kim

IPC分类号： H01L21/8238 ,  H01L21/331 ,  H01L21/8222

CPC分类号： H01L21/8249 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/0623 ,  H01L27/0922 ,  H01L29/0653 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/7809 ,  H01L29/7812

摘要： Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first conductive type well is formed; a first conductive type gate electrode formed on the semiconductor substrate with a gate insulating layer intervening between the gate electrode and the semiconductor substrate; a second conductive type body electrode formed on the semiconductor substrate and separated from the gate electrode; a first conductive type drain electrode formed on the semiconductor substrate and separated from the gate electrode and the body electrode; a second conductive type first body region formed in the well under the body electrode; a second conductive type second body region extending from the first body region to the gate insulating layer and formed in the well; a first conductive type source region formed in the second body region and extending from the first body region to the gate insulating layer; and a first conductive type source electrode extending from the source region to surround the gate electrode on the semiconductor substrate with an insulating layer intervening between the source electrode and gate electrode.

摘要翻译： 提供半导体器件和制造半导体器件的方法。 使用DMOS器件的半导体器件包括：形成第一导电型阱的半导体衬底; 形成在所述半导体衬底上的第一导电型栅极电极，所述栅极绝缘层介于所述栅电极和所述半导体衬底之间; 形成在所述半导体基板上并与所述栅电极分离的第二导电型体电极; 形成在所述半导体基板上并与所述栅电极和所述主体电极分离的第一导电型漏电极; 形成在所述体电极下方的所述阱内的第二导电型第一体区域; 第二导电类型的第二主体区域，其从所述第一主体区域延伸到所述栅极绝缘层并形成在所述阱中; 形成在所述第二主体区域中并从所述第一主体区域延伸到所述栅极绝缘层的第一导电型源极区域; 以及第一导电型源电极，其从所述源极区域延伸，以在所述半导体衬底上围绕所述栅极电极，所述绝缘层介于所述源电极和栅电极之间。

公开(公告)号：US06396084B1

公开(公告)日：2002-05-28

申请号：US09374442

申请日：1999-08-13

申请人： Hyi-jeong Park ,  Hyun-soon Kang

发明人： Hyi-jeong Park ,  Hyun-soon Kang

IPC分类号： H01L2928

CPC分类号： H01L29/861 ,  H01L29/872

摘要： A semiconductor rectifier includes a substrate of a first conductivity type; a current path layer of the first conductivity type formed near the surface of the substrate; a current block layer of a second conductivity type laterally enclosing the current path layer and extending to a depth deeper than the current path layer; and first and second metal layers formed respectively contacting upper and lower surfaces of the substrate. The current path layer has an impurity concentration higher than that of the substrate, and the current block layer has an impurity concentration higher than that of the current path layer. The current path layer is small enough for the portion below the current path layer to be completely blocked by the depletion region formed around the current block layer when a reverse bias or no is applied to the rectifier. The current path layer and the current block layer can be formed in an epitaxial layer of the first conductivity type overlying a high-concentration substrate of the first conductivity type, and a buried layer of the second conductivity type below the current block layer can further reduce reverse bias current.

摘要翻译： 半导体整流器包括第一导电类型的衬底; 形成在基板的表面附近的第一导电类型的电流通路层; 横向包围电流通路层并延伸到比电流通路层更深的深度的第二导电类型的当前阻挡层; 并且形成分别接触所述基板的上表面和下表面的第一和第二金属层。 电流通路层的杂质浓度高于衬底的杂质浓度，并且电流阻挡层的杂质浓度高于电流通路层的杂质浓度。 电流通路层足够小，当电流通路层下方的部分完全被形成在当前阻挡层周围形成的耗尽区域时，当反向偏置或不对整流器施加时。 电流通路层和电流阻挡层可以形成在覆盖第一导电类型的高浓度衬底的第一导电类型的外延层中，并且在当前阻挡层下方的第二导电类型的掩埋层可以进一步减少 反向偏置电流。