公开(公告)号：US5594262A

公开(公告)日：1997-01-14

申请号：US418747

申请日：1995-04-07

申请人： Hyong Y. Lee ,  Belinda Johnson ,  Rocky Reston ,  Chris Ito ,  Gerald Trombley ,  Charles Havasy

发明人： Hyong Y. Lee ,  Belinda Johnson ,  Rocky Reston ,  Chris Ito ,  Gerald Trombley ,  Charles Havasy

IPC分类号： H01L21/338 ,  H01L29/10 ,  H01L31/0256 ,  H01L29/20

CPC分类号： H01L29/66863 ,  H01L29/1075

摘要： The incorporation of an aluminum arsenide (AlAs) buffer layer in a gallium arsenide (GaAs) field effect transistor (FET) structure is found to improve the overall device performance, particularly in the high temperature operating regime. Similar characteristics may be obtained from devices fabricated with an Al.sub.x Ga.sub.1-x As 0.2.ltoreq.x.ltoreq.1 barrier layer. At temperatures greater than 250.degree. C., the semi-insulating gallium arsenide substrate begins to conduct significant amounts of current. The highly resistive AlAs buffer layer limits this increased conduction, thus permitting device operation at temperatures where parasitic leakage currents would impede or prevent device operation. Devices fabricated with AlAs buffer layers exhibited lower drain parasitic leakage currents and showed improved output conductance characteristics at 350.degree. C. ambient temperature. The buffer layer will also improve the backgating problems which are detrimental to the operation of monolithic GaAs digital circuits having closely spaced devices under different bias conditions. An additional benefit of the high temperature capabilities of these devices is an improved reliability at conventional operating temperatures. Devices fabricated with this technology have shown an order of magnitude improvement in switching characteristics over known and published results.

摘要翻译： 发现砷化镓（GaAs）场效应晶体管（FET）结构中掺入砷化铝（AlAs）缓冲层可以提高整体器件性能，特别是在高温工作状态下。 可以从用Al x Ga 1-x As 0.2 x阻挡层制造的器件获得类似的特性。 在大于250℃的温度下，半绝缘砷化镓衬底开始进行大量的电流。 高电阻AlAs缓冲层限制了这种增加的传导，从而允许器件在寄生漏电流会阻碍或阻止器件工作的温度下工作。 用AlAs缓冲层制造的器件表现出较低的漏极寄生漏电流，并且在350℃环境温度下显示出提高的输出电导特性。 缓冲层还将改善背隙问题，这对于在不同偏压条件下具有紧密间隔的器件的单片GaAs数字电路的操作是有害的。 这些设备的高温能力的另外的好处是在常规工作温度下提高了可靠性。 使用该技术制造的器件已经显示出已知和公开结果的开关特性的数量级改善。

公开(公告)号：US5411902A

公开(公告)日：1995-05-02

申请号：US254722

申请日：1994-06-06

申请人： Hyong Y. Lee ,  Belinda Johnson ,  Rocky Reston ,  Chris Ito ,  Gerald Trombley ,  Charles Havasy

发明人： Hyong Y. Lee ,  Belinda Johnson ,  Rocky Reston ,  Chris Ito ,  Gerald Trombley ,  Charles Havasy

IPC分类号： H01L21/338 ,  H01L29/10

CPC分类号： H01L29/66863 ,  H01L29/1075

摘要： The incorporation of an aluminum arsenide (AlAs) buffer layer in a gallium arsenide (GaAs) field effect transistor (FET) structure is found to improve the overall device performance, particularly in the high temperature operating regime. Similar characteristics may be obtained from devices fabricated with an Al.sub.x Ga.sub.1-x As (0.2.ltoreq.x.ltoreq.1) barrier layer. At temperatures greater than 250.degree. C., the semi-insulating gallium arsenide substrate begins to conduct significant amounts of current. The highly resistive AlAs buffer layer limits this increased conduction, thus permitting device operation at temperatures where parasitic leakage currents would impede or prevent device operation. Devices fabricated with AlAs buffer layers exhibited lower drain parasitic leakage currents and showed improved output conductance characteristics at 350.degree. C. ambient temperature. The buffer layer will also improve the backgating problems which are detrimental to the operation of monolithic GaAs digital circuits having closely spaced devices under different bias conditions. An additional benefit of the high temperature capabilities of these devices is an improved reliability at conventional operating temperatures. Devices fabricated with this technology have shown an order of magnitude improvement in switching characteristics.

摘要翻译： 发现砷化镓（GaAs）场效应晶体管（FET）结构中掺入砷化铝（AlAs）缓冲层可以提高整体器件性能，特别是在高温工作状态下。 可以从用Al x Ga 1-x As（0.2≤x≤1）阻挡层制造的器件获得类似的特性。 在大于250℃的温度下，半绝缘砷化镓衬底开始进行大量的电流。 高电阻AlAs缓冲层限制了这种增加的传导，从而允许器件在寄生漏电流会阻碍或阻止器件工作的温度下工作。 用AlAs缓冲层制造的器件表现出较低的漏极寄生漏电流，并且在350℃环境温度下显示出提高的输出电导特性。 缓冲层还将改善背隙问题，这对于在不同偏压条件下具有紧密间隔的器件的单片GaAs数字电路的操作是有害的。 这些设备的高温能力的另外的好处是在常规工作温度下提高了可靠性。 使用该技术制造的器件显示了开关特性的一个数量级的改善。

公开(公告)号：US08758552B2

公开(公告)日：2014-06-24

申请号：US12898623

申请日：2010-10-05

申请人： Steve Canale ,  David J. Zapp ,  Daniel E. Sanchez ,  Hung V. Phan ,  Hyong Y. Lee

发明人： Steve Canale ,  David J. Zapp ,  Daniel E. Sanchez ,  Hung V. Phan ,  Hyong Y. Lee

IPC分类号： B32B38/10

CPC分类号： B32B43/006 ,  H01L21/67005 ,  H01L21/67092 ,  H01L21/67253 ,  H01L21/6835 ,  H01L21/6838 ,  H01L2221/68381 ,  H01L2221/68386 ,  Y10T156/1132 ,  Y10T156/1933 ,  Y10T156/1944 ,  Y10T156/1961 ,  Y10T156/1978

摘要： Disclosed are systems, devices and methodologies for debonding wafers from carrier plates. In certain wafer processing operations, it is desirable to temporarily mount a wafer on a carrier plate for support and ease of handling. Such a mounting can be achieved by bonding the wafer and the carrier plate with an adhesive. Once such operations are completed, the wafer needs to be debonded from the carrier plate. Such a debonding process can be achieved by applying a suction force to the wafer-carrier plate assembly. Various debonding systems, devices and methodologies, and related features, are disclosed.

摘要翻译： 公开了用于从载板剥离晶片的系统，装置和方法。 在某些晶片处理操作中，期望将晶片临时安装在载体板上用于支撑和易于处理。 这种安装可以通过用粘合剂粘合晶片和载体板来实现。 一旦这样的操作完成，晶片需要从载板脱离。 这种脱粘工艺可以通过对晶片载体板组件施加吸力来实现。 公开了各种脱粘系统，装置和方法以及相关特征。

公开(公告)号：US20110297329A1

公开(公告)日：2011-12-08

申请号：US12898623

申请日：2010-10-05

申请人： Steve Canale ,  David J. Zapp ,  Daniel E. Sanchez ,  Hung V. Phan ,  Hyong Y. Lee

发明人： Steve Canale ,  David J. Zapp ,  Daniel E. Sanchez ,  Hung V. Phan ,  Hyong Y. Lee

IPC分类号： H01L21/687

CPC分类号： B32B43/006 ,  H01L21/67005 ,  H01L21/67092 ,  H01L21/67253 ,  H01L21/6835 ,  H01L21/6838 ,  H01L2221/68381 ,  H01L2221/68386 ,  Y10T156/1132 ,  Y10T156/1933 ,  Y10T156/1944 ,  Y10T156/1961 ,  Y10T156/1978

摘要： Disclosed are systems, devices and methodologies for debonding wafers from carrier plates. In certain wafer processing operations, it is desirable to temporarily mount a wafer on a carrier plate for support and ease of handling. Such a mounting can be achieved by bonding the wafer and the carrier plate with an adhesive. Once such operations are completed, the wafer needs to be debonded from the carrier plate. Such a debonding process can be achieved by applying a suction force to the wafer-carrier plate assembly. Various debonding systems, devices and methodologies, and related features, are disclosed.

摘要翻译： 公开了用于从载板剥离晶片的系统，装置和方法。 在某些晶片处理操作中，期望将晶片临时安装在载体板上用于支撑和易于处理。 这种安装可以通过用粘合剂粘合晶片和载体板来实现。 一旦这样的操作完成，晶片需要从载板脱离。 这种脱粘工艺可以通过对晶片载体板组件施加吸力来实现。 公开了各种脱粘系统，装置和方法以及相关特征。