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    Digital data receiver
    2.
    发明授权
    Digital data receiver 失效

    公开(公告)号：US5539782A

    公开(公告)日：1996-07-23

    申请号：US424213

    申请日：1995-04-19

    Applicant: Hyunsoo Shin ,  Humor Hwang

    Inventor： Hyunsoo Shin ,  Humor Hwang

    IPC: H04L7/033 ,  H04L7/02 ,  H04L27/22 ,  H04L27/38 ,  H04N7/24 ,  H04L7/00

    CPC classification number: H04L7/027 ,  H04L7/0029

    Abstract: An apparatus for restoring a symbol timing of a signal received at a receiving side of a digital communication system. The invention includes a first sampling section which is applied with a received signal, for sampling in accordance with a first frequency higher than the sampling frequency possessed by the received signal; a second sampling section which is applied with an output signal of the first sampling section, for sampling in accordance with a first clock signal applied from a symbol timing restoring circuit; an equalizer which is applied with the output signal of the second sampling section for equalizing; a third sampling section which is applied with the output signal of the equalizer, for sampling in accordance with a second clock signal applied from the symbol timing restoring circuit; and a symbol timing restoring circuit which is applied with the output signal of the second sampling section for detecting a present sampling position and generating the first clock signal and the second clock signal variably changed with the sampling position based on the detected present sampling position and an optimum sampling position. Accordingly, a tracing of an optimum sampling position is possible, and further a sampling position tracing even with respect to the position between samples is possible, so that more exact restoration of the symbol data is possible.

    Methods for manufacturing thermally enhanced flip-chip ball grid arrays
    3.
    发明授权
    Methods for manufacturing thermally enhanced flip-chip ball grid arrays 有权
    制造热增强型倒装芯片球栅阵列的方法

    公开(公告)号：US08115301B2

    公开(公告)日：2012-02-14

    申请号：US11601103

    申请日：2006-11-17

    Applicant: KyungOe Kim ,  YoungJoon Kim ,  HyunSoo Shin

    Inventor： KyungOe Kim ,  YoungJoon Kim ,  HyunSoo Shin

    IPC: H01L23/10 ,  H01L23/34 ,  H01L21/00

    CPC classification number: H01L21/4871 ,  H01L23/10 ,  H01L23/42 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/00 ,  H01L2224/0401

    Abstract: Methods for fabricating flip-chips are disclosed. In an exemplary method, a flip-chip is mounted, active-surface downward, onto a substrate such that a back-side of the flip-chip is facing upward and electrical connections are made between the chip and an upward-facing surface of the substrate. An adhesive is applied to selected regions not occupied by the flip-chip. A heat-spreader is applied to contact the applied adhesive without contacting the back-side of the flip-chip, leaving a gap between the heat-spreader and the back-side of the flip-chip. The heat-spreader defines at least one through-hole that, when the heat-spreader is placed, is within a perimeter of the flip-chip. The adhesive is cured, and a thermal-insulating material (TIM) is applied through the at least one through-hole so as to fill the gap with the TIM. The methods substantially reduce the probability of die damage that otherwise occurs during attachment of heat-spreaders.

    Abstract translation: 公开了制造倒装芯片的方法。 在示例性方法中，将倒装芯片向下安装到基板上，使得倒装芯片的背面朝上，并且在芯片与芯片之间形成电连接 基质。 将粘合剂施加到未被倒装芯片占据的选定区域。 应用散热器来接触所施加的粘合剂而不接触倒装芯片的背面，在散热器和倒装芯片的背面之间留下间隙。 散热器限定了至少一个通孔，当散热器放置时，该通孔位于倒装芯片的周边内。 粘合剂被固化，并且通过至少一个通孔施加绝热材料（TIM），以便填充与TIM的间隙。 这些方法大大降低了在散热器附着期间发生的模具损坏的可能性。

    Decoding method and apparatus having optimum decoding paths
    4.
    发明授权
    Decoding method and apparatus having optimum decoding paths 失效
    具有最佳解码路径的解码方法和装置

    公开(公告)号：US5488637A

    公开(公告)日：1996-01-30

    申请号：US219293

    申请日：1994-03-28

    Applicant: Jechang Jeong ,  Hyunsoo Shin

    Inventor： Jechang Jeong ,  Hyunsoo Shin

    IPC: H04L25/08 ,  H03M13/23 ,  H04L25/03 ,  H04L27/06

    CPC classification number: H04L25/03203

    Abstract: A decoding method and apparatus having an optimum decoding path includes a Viterbi decoder having an overlapping function in which the input signal is moved in units of the window movement distance of at least one symbol and the code sequence is decoded in units representing a decoding depth, so that overlap in the decoded data occurs. Then, the output of the Viterbi decoder with the overlap function is stored in a memory. A control signal generator controls the positions of the data to be output from the memory according to the output of a counter receiving the decoded data. The most frequent data out of all data supplied to a comparator is selected as an optimum decoding path. Thus, the error associated with wrong path selection, e.g., when the data is wrongly decoded due to the error generated by the noise added during transmission, can be reduced.

    Abstract translation: 具有最佳解码路径的解码方法和装置包括具有重叠功能的维特比解码器，其中输入信号以至少一个符号的窗口移动距离为单位移动，代码序列以表示解码深度的单位进行解码， 使得解码数据中的重叠发生。 然后，具有重叠功能的维特比解码器的输出被存储在存储器中。 控制信号发生器根据接收到解码数据的计数器的输出来控制要从存储器输出的数据的位置。 选择提供给比较器的所有数据中最频繁的数据作为最佳解码路径。 因此，可以减少与错误路径选择相关的错误，例如当由于在传输期间添加的噪声产生的错误而错误地解码了数据时。

    MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    5.
    发明申请
    MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权
    磁记忆体装置及其制造方法

    公开(公告)号：US20160035969A1

    公开(公告)日：2016-02-04

    申请号：US14703842

    申请日：2015-05-04

    Applicant: Shin-Jae KANG ,  JONGCHUL PARK ,  BYOUNGJAE BAE ,  Jaesuk KWON ,  Hyunsoo SHIN

    Inventor： Shin-Jae KANG ,  JONGCHUL PARK ,  BYOUNGJAE BAE ,  Jaesuk KWON ,  Hyunsoo SHIN

    IPC: H01L43/02 ,  H01L43/10

    CPC classification number: H01L43/08 ,  G11C11/161 ,  H01L27/222 ,  H01L27/224 ,  H01L27/228 ,  H01L43/02 ,  H01L43/12

    Abstract: A method of fabricating a magnetic memory device is provided. The method may include sequentially forming a first magnetic layer, a tunnel barrier layer, and a second magnetic layer on a substrate, forming a mask pattern on the second magnetic layer to expose a portion of the second magnetic layer, forming a capping insulating layer on a sidewall of the mask pattern and the portion of the second magnetic layer, injecting an oxygen ion into the portion of the second magnetic layer through the capping insulating layer to form an oxide layer, anisotropically etching the capping insulating layer to form a capping spacer, and patterning the oxide layer, the tunnel barrier layer, and the first magnetic layer using the mask pattern and the capping spacer.

    Abstract translation: 提供一种制造磁存储器件的方法。 该方法可以包括在衬底上顺序地形成第一磁性层，隧道势垒层和第二磁性层，在第二磁性层上形成掩模图案以暴露第二磁性层的一部分，形成封盖绝缘层 掩模图案的侧壁和第二磁性层的部分，通过封盖绝缘层将氧离子注入到第二磁性层的部分中以形成氧化物层，各向异性地蚀刻封盖绝缘层以形成封盖间隔物， 以及使用掩模图案和封盖间隔物图案化氧化物层，隧道势垒层和第一磁性层。

    Methods for manufacturing thermally enhanced flip-chip ball grid arrays
    6.
    发明申请
    Methods for manufacturing thermally enhanced flip-chip ball grid arrays 有权
    制造热增强型倒装芯片球栅阵列的方法

    公开(公告)号：US20080116586A1

    公开(公告)日：2008-05-22

    申请号：US11601103

    申请日：2006-11-17

    Applicant: KyungOe Kim ,  YoungJoon Kim ,  HyunSoo Shin

    Inventor： KyungOe Kim ,  YoungJoon Kim ,  HyunSoo Shin

    IPC: H01L23/36 ,  H01L21/58

    CPC classification number: H01L21/4871 ,  H01L23/10 ,  H01L23/42 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/00 ,  H01L2224/0401

    Abstract: Methods for fabricating flip-chips are disclosed. In an exemplary method, a flip-chip is mounted, active-surface downward, onto a substrate such that a back-side of the flip-chip is facing upward and electrical connections are made between the chip and an upward-facing surface of the substrate. An adhesive is applied to selected regions not occupied by the flip-chip. A heat-spreader is applied to contact the applied adhesive without contacting the back-side of the flip-chip, leaving a gap between the heat-spreader and the back-side of the flip-chip. The heat-spreader defines at least one through-hole that, when the heat-spreader is placed, is within a perimeter of the flip-chip. The adhesive is cured, and a thermal-insulating material (TIM) is applied through the at least one through-hole so as to fill the gap with the TIM. The methods substantially reduce the probability of die damage that otherwise occurs during attachment of heat-spreaders.

    Abstract translation: 公开了制造倒装芯片的方法。 在示例性方法中，将倒装芯片向下安装到基板上，使得倒装芯片的背面朝上，并且在芯片与芯片之间形成电连接 基质。 将粘合剂施加到未被倒装芯片占据的选定区域。 应用散热器来接触所施加的粘合剂而不接触倒装芯片的背面，在散热器和倒装芯片的背面之间留下间隙。 散热器限定了至少一个通孔，当散热器放置时，该通孔位于倒装芯片的周边内。 粘合剂被固化，并且通过至少一个通孔施加绝热材料（TIM），以便填充与TIM的间隙。 这些方法大大降低了在散热器附着期间发生的模具损坏的可能性。

    Digital data receiver
    9.
    发明授权
    Digital data receiver 失效
    数字数据接收机

    公开(公告)号：US5490174A

    公开(公告)日：1996-02-06

    申请号：US274030

    申请日：1994-07-12

    Applicant: Hyunsoo Shin ,  Humor Hwang

    Inventor： Hyunsoo Shin ,  Humor Hwang

    IPC: H04L7/033 ,  H04L7/02 ,  H04L27/22 ,  H04L27/38 ,  H04N7/24

    CPC classification number: H04L7/027 ,  H04L7/0029

    Abstract: An apparatus for restoring a symbol timing of a signal received at a receiving side of a digital communication system. The invention includes a first sampling section which is applied with a received signal, for sampling in accordance with a first frequency higher than the sampling frequency possessed by the received signal; a second sampling section which is applied with an output signal of the first sampling section, for sampling in accordance with a first clock signal applied from a symbol timing restoring circuit; an equalizer which is applied with the output signal of the second sampling section for equalizing; a third sampling section which is applied with the output signal of the equalizer, for sampling in accordance with a second clock signal applied from the symbol timing restoring circuit; and a symbol timing restoring circuit which is applied with the output signal of the second sampling section for detecting a present sampling position and generating the first clock signal and the second clock signal variably changed with the sampling position based on the detected present sampling position and an optimum sampling position. Accordingly, a tracing of an optimum sampling position is possible, and further a sampling position tracing even with respect to the position between samples is possible, so that more exact restoration of the symbol data is possible.

    Abstract translation: 一种用于恢复在数字通信系统的接收侧接收的信号的符号定时的装置。 本发明包括一个应用接收信号的第一采样部分，用于根据接收信号所拥有的采样频率的第一频率进行采样; 第二采样部分，其被施加有第一采样部分的输出信号，用于根据从符号定时恢复电路施加的第一时钟信号进行采样; 均衡器，其被施加第二采样部分的输出信号用于均衡; 第三采样部分，其被施加有均衡器的输出信号，用于根据从符号定时恢复电路施加的第二时钟信号进行采样; 以及符号定时恢复电路，其被施加有用于检测当前采样位置的第二采样部分的输出信号，并且基于检测到的当前采样位置产生与采样位置可变地改变的第一时钟信号和第二时钟信号，以及 最佳采样位置。 因此，最佳采样位置的跟踪是可能的，并且进一步地，甚至相对于样本之间的位置的采样位置跟踪也是可能的，使得更准确地恢复符号数据是可能的。

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