Semiconductor device and method comprising a high voltage reset driver and an isolated memory array
    1.
    发明授权
    Semiconductor device and method comprising a high voltage reset driver and an isolated memory array 有权
    半导体器件和方法包括高电压复位驱动器和隔离存储器阵列

    公开(公告)号:US07919775B2

    公开(公告)日:2011-04-05

    申请号:US12472913

    申请日:2009-05-27

    Abstract: A method of operating a semiconductor device, a semiconductor device and a digital micromirror system are presented. In an embodiment, the semiconductor device comprises a grounded substrate, a memory array, and a reset driver. The memory array may be isolated from the grounded substrate with a buried layer. The set of voltages of the memory array may be shifted with respect to a reset voltage. The reset driver may drive the reset voltage and the reset driver may have at least one extended drain transistor in the grounded substrate.

    Abstract translation: 提出了一种操作半导体器件,半导体器件和数字微镜系统的方法。 在一个实施例中,半导体器件包括接地衬底,存储器阵列和复位驱动器。 存储器阵列可以与具有掩埋层的接地衬底隔离。 存储器阵列的电压组可以相对于复位电压移动。 复位驱动器可以驱动复位电压,并且复位驱动器可以在接地的基板中具有至少一个延伸的漏极晶体管。

    Method and system for controlling spatial light modulator interface buses
    2.
    发明授权
    Method and system for controlling spatial light modulator interface buses 有权
    控制空间光调制器接口总线的方法和系统

    公开(公告)号:US07847795B2

    公开(公告)日:2010-12-07

    申请号:US11754176

    申请日:2007-05-25

    CPC classification number: G09G3/34

    Abstract: In accordance with the teachings of the present disclosure, a method and system for controlling spatial light modulator buses are provided. In accordance with one embodiment of the present disclosure, a bus controller includes a configurable bus interface having first and second modes of operation. The first mode of operation is configured to interface with a single spatial light modulator. The second mode of operation is configured to interface in parallel with a plurality of spatial light modulators. In accordance with another embodiment of the present disclosure, a method of controlling a bus includes configuring a bus interface of a bus controller to interface in parallel with a plurality of digital micromirror devices.

    Abstract translation: 根据本公开的教导,提供了一种用于控制空间光调制器总线的方法和系统。 根据本公开的一个实施例,总线控制器包括具有第一和第二操作模式的可配置总线接口。 第一操作模式被配置为与单个空间光调制器接口。 第二操作模式被配置为与多个空间光调制器并联接口。 根据本公开的另一实施例,一种控制总线的方法包括配置总线控制器的总线接口以与多个数字微镜器件并联接口。

    System and Method for Grouped Pixel Addressing
    3.
    发明申请
    System and Method for Grouped Pixel Addressing 有权
    用于分组像素寻址的系统和方法

    公开(公告)号:US20100073397A1

    公开(公告)日:2010-03-25

    申请号:US12236379

    申请日:2008-09-23

    CPC classification number: G09G3/346 G09G3/2022 G09G2300/0439 G09G2310/0235

    Abstract: In accordance with the teachings of the present disclosure, a system and method for displaying an image are provided. In one embodiment, the method includes receiving a data stream representing a frame of an image. The data stream may indicate a first color pixel cluster corresponding to a first color and a second color pixel cluster corresponding to a second color. The first color pixel cluster and the second color pixel cluster may be displayed. The first color pixel cluster may be different from the second color pixel cluster.

    Abstract translation: 根据本公开的教导,提供了一种用于显示图像的系统和方法。 在一个实施例中,该方法包括接收表示图像帧的数据流。 数据流可以指示对应于第一颜色的第一颜色像素簇和对应于第二颜色的第二颜色像素簇。 可以显示第一颜色像素簇和第二颜色像素簇。 第一颜色像素簇可以不同于第二颜色像素簇。

    System and method for grouped pixel addressing
    4.
    发明授权
    System and method for grouped pixel addressing 有权
    用于分组像素寻址的系统和方法

    公开(公告)号:US08237731B2

    公开(公告)日:2012-08-07

    申请号:US12236379

    申请日:2008-09-23

    CPC classification number: G09G3/346 G09G3/2022 G09G2300/0439 G09G2310/0235

    Abstract: In accordance with the teachings of the present disclosure, a system and method for displaying an image are provided. In one embodiment, the method includes receiving a data stream representing a frame of an image. The data stream may indicate a first color pixel cluster corresponding to a first color and a second color pixel cluster corresponding to a second color. The first color pixel cluster and the second color pixel cluster may be displayed. The first color pixel cluster may be different from the second color pixel cluster.

    Abstract translation: 根据本公开的教导,提供了一种用于显示图像的系统和方法。 在一个实施例中,该方法包括接收表示图像帧的数据流。 数据流可以指示对应于第一颜色的第一颜色像素簇和对应于第二颜色的第二颜色像素簇。 可以显示第一颜色像素簇和第二颜色像素簇。 第一颜色像素簇可以不同于第二颜色像素簇。

    Access time measurement circuit and method
    5.
    发明授权
    Access time measurement circuit and method 失效
    访问时间测量电路和方法

    公开(公告)号:US06266749B1

    公开(公告)日:2001-07-24

    申请号:US09041264

    申请日:1998-03-12

    CPC classification number: G11C29/56 G01R31/31937 G11C29/50

    Abstract: A circuit for measuring the access time of a memory circuit. The circuit includes a storage element 908 having an input terminal, an output terminal, and a clock terminal. The input terminal of the storage element is coupled to an output of the memory circuit 900. A clock signal source 906 is coupled to the clock terminal of the storage element and to a clock terminal of the memory circuit. The circuit also includes test circuitry 902 coupled to address and control terminals of the memory circuit and to the output terminal of the storage element. The test circuitry is operable to store or generate a test data pattern and compare the pattern to data output from the storage element. In one embodiment, the storage element is a data latch comprising a clock-enabled inverter serially coupled with a flip-flop. The flip-flop in one embodiment is a cross-coupled inverter storage cell or “keeper”. For a clock signal having a pulse length or duty cycle that is longer than the access time of the memory circuit, the output of the storage element matches the data pattern stored by the test circuitry. As the clock frequency is increased, or the duty cycle decreased, so that the pulse length approximates the access time, the data output from the storage element no longer matches the data expected by the test circuitry, thus allowing a determination of the access time.

    Abstract translation: 一种用于测量存储电路的存取时间的电路。 电路包括具有输入端子,输出端子和时钟端子的存储元件908。 存储元件的输入端耦合到存储器电路900的输出。时钟信号源906耦合到存储元件的时钟端子和存储器电路的时钟端子。 电路还包括耦合到存储器电路的地址和控制端子以及存储元件的输出端子的测试电路902。 测试电路可操作以存储或生成测试数据模式,并将模式与存储元件输出的数据进行比较。 在一个实施例中,存储元件是包括与触发器串联耦合的使能时钟的反相器的数据锁存器。 在一个实施例中,触发器是交叉耦合的逆变器存储单元或“保持器”。 对于具有比存储器电路的访问时间长的脉冲长度或占空比的时钟信号,存储元件的输出与由测试电路存储的数据模式相匹配。 随着时钟频率增加或占空比减小,使得脉冲长度接近访问时间,从存储元件输出的数据不再与测试电路预期的数据匹配,从而允许确定访问时间。

    IMAGING BIT PLANE SEQUENCING USING PIXEL VALUE REPETITION
    7.
    发明申请
    IMAGING BIT PLANE SEQUENCING USING PIXEL VALUE REPETITION 有权
    使用像素值重复排列成像平面图

    公开(公告)号:US20120299952A1

    公开(公告)日:2012-11-29

    申请号:US13567244

    申请日:2012-08-06

    CPC classification number: G09G3/346 G09G3/2022 G09G2300/0439 G09G2310/0235

    Abstract: A system and method for displaying an image are provided. In one embodiment, the method includes receiving a data stream representing a frame of an image. The data stream may indicate a first color pixel cluster corresponding to a first color and a second color pixel cluster corresponding to a second color. The first color pixel cluster and the second color pixel cluster may be displayed. The first color pixel cluster may be different from the second color pixel cluster.

    Abstract translation: 提供了一种用于显示图像的系统和方法。 在一个实施例中,该方法包括接收表示图像帧的数据流。 数据流可以指示对应于第一颜色的第一颜色像素簇和对应于第二颜色的第二颜色像素簇。 可以显示第一颜色像素簇和第二颜色像素簇。 第一颜色像素簇可以不同于第二颜色像素簇。

    Method and System for Controlling Spatial Light Modulator Interface Buses
    8.
    发明申请
    Method and System for Controlling Spatial Light Modulator Interface Buses 有权
    控制空间光调制器接口总线的方法和系统

    公开(公告)号:US20080291185A1

    公开(公告)日:2008-11-27

    申请号:US11754176

    申请日:2007-05-25

    CPC classification number: G09G3/34

    Abstract: In accordance with the teachings of the present disclosure, a method and system for controlling spatial light modulator buses are provided. In accordance with one embodiment of the present disclosure, a bus controller includes a configurable bus interface having first and second modes of operation. The first mode of operation is configured to interface with a single spatial light modulator. The second mode of operation is configured to interface in parallel with a plurality of spatial light modulators. In accordance with another embodiment of the present disclosure, a method of controlling a bus includes configuring a bus interface of a bus controller to interface in parallel with a plurality of digital micromirror devices.

    Abstract translation: 根据本公开的教导,提供了一种用于控制空间光调制器总线的方法和系统。 根据本公开的一个实施例,总线控制器包括具有第一和第二操作模式的可配置总线接口。 第一操作模式被配置为与单个空间光调制器接口。 第二操作模式被配置为与多个空间光调制器并联接口。 根据本公开的另一实施例,一种控制总线的方法包括配置总线控制器的总线接口以与多个数字微镜器件并联接口。

    Telephone lock
    9.
    发明授权
    Telephone lock 失效
    电话锁

    公开(公告)号:US4028508A

    公开(公告)日:1977-06-07

    申请号:US692134

    申请日:1976-06-02

    Applicant: James N. Hall

    Inventor: James N. Hall

    CPC classification number: H04M1/667

    Abstract: A locking device is provided for use in preventing the unauthorized use of telephones of the type having a handset and a base wherein the calling element is contained on the inner surface of the headset. The device includes a fixed engaging element attached to a locking element by means of a strap which encircles the outer surface of the handset. An adjustable engaging element is further provided and is adjustably secured to the locking element. When the calling element is a rotary dial, the engaging elements engage the dial and prevent rotation thereof. When the calling element is a plurality of push buttons, the engaging elements engage a protective cover and prevent manipulation of the pushbutton.

    Abstract translation: 提供锁定装置,用于防止未经授权使用具有听筒和基座的类型的电话,其中呼叫元件容纳在耳机的内表面上。 该装置包括固定的接合元件,该固定的接合元件通过围绕手柄的外表面的带子附接到锁定元件。 进一步设置可调节的接合元件并且可调节地固定到锁定元件。 当呼叫元件是旋转拨盘时,接合元件接合拨盘并防止转动。 当呼叫元件是多个按钮时,接合元件接合保护盖并防止按钮的操纵。

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