公开(公告)号：US5976920A

公开(公告)日：1999-11-02

申请号：US684761

申请日：1996-07-22

申请人： Kenichi Nakano ,  Christopher A. Bozada ,  Tony K. Quach ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

发明人： Kenichi Nakano ,  Christopher A. Bozada ,  Tony K. Quach ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

IPC分类号： H01L21/285 ,  H01L21/335 ,  H01L29/778 ,  H01L21/338

CPC分类号： H01L29/66462 ,  H01L21/28587 ,  H01L29/7783 ,  Y10S438/949

摘要： A method for fabricating a periodic table group III-IV HEMT/pHEMT field-effect transistor device. The disclosed fabrication arrangement uses a single metalization for ohmic and Schottky barrier contacts, employs selective etching with a permanent etch stop layer, employs a non-alloyed ohmic contact semiconductor layer and includes a permanent non-photosensitive secondary mask element. The invention includes provisions for both an all optical lithographic process and a combined optical and electron beam lithographic process These concepts are combined to provide a field-effect transistor device of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

摘要翻译： 一种用于制造周期表III-IV族HEMT / pHEMT场效应晶体管器件的方法。 所公开的制造装置使用单一金属化用于欧姆和肖特基势垒接触，采用永久蚀刻停止层的选择性蚀刻，采用非合金欧姆接触半导体层并且包括永久非光敏次级掩模元件。 本发明包括用于全光学光刻工艺和组合光学和电子束光刻工艺的设备。这些概念被组合以提供降低制造成本，增加的尺寸精度和现有技术电气性能的场效应晶体管器件。

公开(公告)号：US06198116B1

公开(公告)日：2001-03-06

申请号：US09059890

申请日：1998-04-14

申请人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

发明人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

IPC分类号： H01L29778

CPC分类号： H01L29/66871 ,  H01L21/28587 ,  H01L21/8252 ,  H01L27/0605

摘要： A method for fabricating a periodic table group III-IV metal semiconductor metal field-effect enhancement mode complementary transistor pair device is described, a device typically made of gallium arsenide materials. The disclosed fabrication uses initially undoped semiconductor materials, single metallization for ohmic and Schottky barrier contacts, employs a non-alloyed ohmic contact semiconductor layer and includes an inorganic dielectric material layer providing non photosensitive masking at plural points in the fabrication sequence. The invention uses selective ion implantations, and a combined optical and electron beam lithographic process, the latter in small dimension gate areas. These attributes are combined to provide a field-effect transistor complementary pair of reduced fabrication cost, low electrical energy operating requirements increased dimensional accuracy and current state of the art electrical performance. Fabricated device characteristics are also disclosed.

摘要翻译： 描述了一种用于制造周期表III-IV族金属半导体金属场效应增强型互补晶体管对器件的方法，该器件通常由砷化镓材料制成。 所公开的制造使用最初未掺杂的半导体材料，用于欧姆和肖特基势垒接触的单一金属化，采用非合金欧姆接触半导体层，并且包括在制造顺序中的多个点处提供非感光掩模的无机介电材料层。 本发明使用选择性离子注入，以及组合的光学和电子束光刻工艺，后者在小尺寸栅极区域中。 这些属性被组合以提供减小制造成本的场效应晶体管互补对，低电能操作需求增加尺寸精度和现有电气性能的当前状态。 还公开了制造的器件特性。

公开(公告)号：US6066865A

公开(公告)日：2000-05-23

申请号：US59891

申请日：1998-04-14

申请人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

发明人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

IPC分类号： H01L21/285 ,  H01L21/335 ,  H01L29/812 ,  H01L31/0328

CPC分类号： H01L29/66462 ,  H01L21/28581 ,  H01L21/28587 ,  H01L29/8128

摘要： An enhancement mode periodic table group III-IV semiconductor field-effect transistor device is disclosed. The disclosed transistor includes single metallization for ohmic and Schottky barrier contacts, a permanent non photosensitive passivation layer (a layer which has also been used for masking purposes during fabrication of the transistor) and a gate element of small dimension and shaped cross section as needed to provide desirable microwave spectrum electrical characteristics. The transistor of the invention is fabricated from undoped semiconductor materials disposed in a layered wafer structure and selectively doped by ion implantation to achieve either a p-channel or an n-channel transistor. The semiconductor materials may include two, one or zero buffer layers in their layer structure. The disclosed transistor is of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

摘要翻译： 公开了一种增强型周期表III-IV族半导体场效应晶体管器件。 所公开的晶体管包括用于欧姆和肖特基势垒触点的单一金属化，永久非光敏钝化层（在晶体管制造期间也被用于掩蔽目的的层）和根据需要的小尺寸和形状的截面的栅极元件 提供所需的微波频谱电气特性。 本发明的晶体管由设置在分层晶片结构中的未掺杂半导体材料制成，并通过离子注入选择性地掺杂以实现p沟道或n沟道晶体管。 半导体材料可以包括其层结构中的两个，一个或零个缓冲层。 所公开的晶体管具有降低的制造成本，增加的尺寸精度和现有技术的电性能。

公开(公告)号：US5698870A

公开(公告)日：1997-12-16

申请号：US684756

申请日：1996-07-22

申请人： Kenichi Nakano ,  Christopher A. Bozada ,  Tony K. Quach ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

发明人： Kenichi Nakano ,  Christopher A. Bozada ,  Tony K. Quach ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

IPC分类号： H01L21/285 ,  H01L21/335 ,  H01L29/417 ,  H01L29/45 ,  H01L29/778 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L29/66462 ,  H01L21/28587 ,  H01L29/41775 ,  H01L29/452 ,  H01L29/7787

摘要： A periodic table group III-IV HEMT/PHEMT field-effect transistor device and its fabrication is described. The disclosed fabrication arrangement uses a single metallization for ohmic and Schottky barrier contacts, employs selective etching with a permanent etch stop layer, employs a non-alloyed ohmic contact semiconductor layer and includes a permanent non photoresponsive secondary mask element affording several practical advantages during fabrication and in the completed transistor. The invention includes provisions for both an all-optical lithographic fabrication process and a combined optical and electron beam lithographic process. These concepts are combined to provide a field-effect transistor device of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

摘要翻译： 描述了周期表III-IV族HEMT / PHEMT场效应晶体管器件及其制造。 所公开的制造布置对欧姆和肖特基势垒接触使用单一金属化，采用永久蚀刻停止层的选择性蚀刻，采用非合金欧姆接触半导体层，并且包括在制造过程中提供若干实际优点的永久非光响应次级掩模元件， 在完成的晶体管中。 本发明包括用于全光刻平版印刷制造工艺和组合的光学和电子束光刻工艺的规定。 这些概念被组合以提供减小制造成本，增加的尺寸精度和现有电气性能的场效应晶体管器件。

公开(公告)号：US06653214B1

公开(公告)日：2003-11-25

申请号：US10034747

申请日：2002-01-03

申请人： Tony K. Quach ,  G. David Via ,  James S. Sewell ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  Ross W. Dettmer ,  John L. Ebel ,  James K. Gillespie ,  Thomas Jenkins ,  Kenichi Nakano

发明人： Tony K. Quach ,  G. David Via ,  James S. Sewell ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  Ross W. Dettmer ,  John L. Ebel ,  James K. Gillespie ,  Thomas Jenkins ,  Kenichi Nakano

IPC分类号： H01L2144

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： An integrated circuit substrate via-hole fabrication arrangement providing for accurate determination of via-hole size and via-hole registration through use of a calibrated pattern formed into the integrated circuit substrate during portions of the normal circuit fabrication process. Initiation of the via-hole and fabrication of the calibrated pattern from one surface, such as the front side, of the integrated circuit wafer and completion of the via-hole from the opposite surface of the wafer are contemplated. The calibrated pattern may be one of several possible physical configurations and of selected dimensions usable with the process, materials and circuitry of the device being fabricated. Use of the invention in fabricating ground conductor-connected via conductors for gigahertz radio frequency-capable integrated circuits of the monolithic or mixed hybrid with monolithic type and having a ground plane element is contemplated.

摘要翻译： 一种集成电路衬底通孔制造装置，其通过在正常电路制造工艺的部分期间通过使用形成在集成电路衬底中的校准图案来准确地确定通孔尺寸和通孔配准。 设想从集成电路晶片的一个表面（例如前侧）开始通孔并制造校准图案，并且从晶片的相对表面完成通孔。 校准图案可以是几个可能的物理配置中的一个以及可用于正在制造的设备的工艺，材料和电路的选定尺寸之一。 设想将本发明用于制造具有整体式或具有接地平面元件的单片或混合混合物的千兆赫兹无线电频率集成电路的接地导体连接通孔导体。

公开(公告)号：US5796131A

公开(公告)日：1998-08-18

申请号：US684759

申请日：1996-07-22

申请人： Kenichi Nakano ,  Christopher A. Bozada ,  Tony K. Quach ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

发明人： Kenichi Nakano ,  Christopher A. Bozada ,  Tony K. Quach ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

IPC分类号： H01L21/285 ,  H01L21/338 ,  H01L21/76 ,  H01L29/47 ,  H01L29/812 ,  H01L29/80

CPC分类号： H01L29/66863 ,  H01L21/28575 ,  H01L21/28581 ,  H01L21/7605 ,  H01L29/475 ,  H01L29/8128

摘要： A periodic table group III-IV metal semiconductor metal field-effect transistor device is described. The disclosed device includes single metalization for ohmic and Schottky barrier contacts, an elective permanent etch stop layer, a non-alloyed ohmic contact semiconductor layer and a permanent non photosensitive secondary mask element. The invention may be achieved with one of an all optical lithographic process and a combined optical and electron beam lithographic process The disclosed field-effect transistor device is of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

摘要翻译： 描述了周期表III-IV族金属半导体金属场效应晶体管器件。 所公开的器件包括用于欧姆和肖特基势垒触点的单金属化，选择性永久蚀刻停止层，非合金欧姆接触半导体层和永久非光敏次级掩模元件。 本发明可以通过全光学光刻工艺和组合的光学和电子束光刻工艺中的一种实现。所公开的场效应晶体管器件具有降低的制造成本，增加的尺寸精度和现有技术的电性能。

公开(公告)号：US5940694A

公开(公告)日：1999-08-17

申请号：US684755

申请日：1996-07-22

申请人： Christopher A. Bozada ,  Tony K. Quach ,  Kenichi Nakano ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

发明人： Christopher A. Bozada ,  Tony K. Quach ,  Kenichi Nakano ,  Gregory C. DeSalvo ,  G. David Via ,  Ross W. Dettmer ,  Charles K. Havasy ,  James S. Sewell ,  John L. Ebel ,  James K. Gillespie

IPC分类号： H01L21/338 ,  H01L21/76 ,  H01L21/8258 ,  H01L27/06 ,  H01L29/45 ,  H01L29/778

CPC分类号： H01L29/66863 ,  H01L21/7605 ,  H01L21/8258 ,  H01L27/0605 ,  H01L29/452 ,  H01L29/7787 ,  Y10S438/949 ,  Y10S438/951

摘要： A method for fabricating a periodic table group III-IV field-effect transistor device is described. The disclosed fabrication arrangement uses a single metallization for ohmic and Schottky barrier contacts, employs selective etching with a permanent etch stop layer, employs a non-alloyed ohmic contact semiconductor layer and includes a permanent semiconductor material secondary mask element, a mask element which can be grown epitaxially during wafer fabrication. The invention includes provisions for both an all optical lithographic process and a combined optical and electron beam lithographic process These concepts are combined to provide a field-effect transistor device of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

摘要翻译： 描述了周期表III-IV族场效应晶体管器件的制造方法。 所公开的制造布置对欧姆和肖特基势垒接触使用单一金属化，采用永久蚀刻停止层的选择性蚀刻，采用非合金欧姆接触半导体层，并且包括永久性半导体材料二次掩模元件，可以是 在晶片制造期间外延生长。 本发明包括用于全光学光刻工艺和组合光学和电子束光刻工艺的设备。这些概念被组合以提供降低制造成本，增加的尺寸精度和现有技术电气性能的场效应晶体管器件。

公开(公告)号：US06222210B1

公开(公告)日：2001-04-24

申请号：US09059869

申请日：1998-04-14

申请人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

发明人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

IPC分类号： H01L310328

CPC分类号： H01L27/0605 ,  H01L21/8252 ,  H01L29/8128

摘要： An enhancement mode periodic table group III-IV semiconductor field-effect transistor complementary pair device is disclosed. The disclosed complementary pair include single metallization for ohmic and Schottky barrier contacts, a permanent non photosensitive passivation layer (a layer which has also been used for masking purposes during fabrication of the device) and gate elements of small dimension and shaped cross section to provide desirable microwave spectrum electrical characteristics. The complementary pair of the invention is fabricated from undoped semiconductor materials disposed in a layered wafer structure and selectively doped by ion implantation to achieve both the p-channel and n-channel transistors. The semiconductor materials may include two, one or zero buffer layers in their layer structure. The disclosed complementary pair is of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.

摘要翻译： 公开了增强型周期表III-IV族半导体场效应晶体管互补对器件。 所公开的互补对包括用于欧姆和肖特基势垒接触的单一金属化，永久非光敏钝化层（在制造器件期间也用于掩蔽目的的层）和小尺寸和成形截面的栅极元件以提供期望的 微波频谱电气特性。 本发明的互补对是由设置在分层晶片结构中的未掺杂半导体材料制造的，并通过离子注入选择性地掺杂以实现p沟道晶体管和n沟道晶体管。 半导体材料可以包括其层结构中的两个，一个或零个缓冲层。 所公开的互补对具有降低的制造成本，增加的尺寸精度和现有技术的电性能。

公开(公告)号：US6020226A

公开(公告)日：2000-02-01

申请号：US59892

申请日：1998-04-14

申请人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

发明人： Charles L. A. Cerny ,  Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

IPC分类号： H01L21/285 ,  H01L21/335 ,  H01L21/338

CPC分类号： H01L29/66462 ,  H01L21/28581

摘要： A method for fabricating an enhancement mode periodic table group III-IV metal semiconductor metal field-effect transistor is described. The disclosed fabrication arrangement uses single metallization for ohmic and Schottky barrier contacts, employs initially undoped semiconductor materials--materials selectively doped in a disclosed processing step, employs a non-alloyed ohmic contact semiconductor layer and includes an inorganic dielectric material layer providing non photosensitive masking at plural points in the fabrication sequence along with permanent surface passivation. The invention uses a combined optical and electron beam lithographic process, the latter in small dimension gate areas. These attributes are combined to provide a field-effect transistor capable of microwave frequency use, of reduced fabrication cost, low electrical energy operating requirements increased dimensional accuracy and state of the art electrical performance. Fabricated device characteristics are also disclosed.

摘要翻译： 描述了制造增强型周期表III-IV族金属半导体金属场效应晶体管的方法。 所公开的制造布置对欧姆和肖特基势垒触点使用单一金属化，采用最初未掺杂的半导体材料 - 在所公开的处理步骤中选择性掺杂的材料，采用非合金欧姆接触半导体层，并且包括提供非光敏掩模的无机介电材料层 制造顺序中的多个点以及永久表面钝化。 本发明使用组合的光学和电子束光刻工艺，后者在小尺寸栅极区域中。 这些属性被组合以提供能够进行微波频率使用的场效应晶体管，降低了制造成本，低电能操作要求增加了尺寸精度和现有技术的电气性能。 还公开了制造的器件特性。

公开(公告)号：US6004881A

公开(公告)日：1999-12-21

申请号：US990881

申请日：1997-12-15

申请人： Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Charles L.A. Cerny ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

发明人： Christopher A. Bozada ,  Gregory C. DeSalvo ,  John L. Ebel ,  Charles L.A. Cerny ,  Ross W. Dettmer ,  James K. Gillespie ,  Charles K. Havasy ,  Thomas J. Jenkins ,  Kenichi Nakano ,  Carl I. Pettiford ,  Tony K. Quach ,  James S. Sewell ,  G. David Via

IPC分类号： H01L21/306 ,  H01L21/302

CPC分类号： H01L21/30612

摘要： A room temperature wet chemical digital etching technique for, gallium arsenide or other semiconductor material. Hydrogen peroxide and an acid are used in a two step etching cycle to remove the gallium arsenide in approximately 15 .ANG. limited increments. In the first step of the cycle, gallium arsenide is oxidized by, for example, 30% hydrogen peroxide to form an oxide layer that is diffusion limited to a thickness of, for example, 14-17 .ANG. for time periods from 15 seconds to 120 seconds. The second step of the cycle removes this oxide layer with an acid that does not attack unoxidized gallium arsenide. These steps are repeated in succession using new reactant materials and cleaning after each reactant (to prevent reactant contamination) until the desired etch depth is obtained. Experimental results are presented demonstrating the etch rate and process invariability with respect to hydrogen peroxide and acid exposure times. A method for using a Hall effect measurement to determine the achieved change in surface layer thickness of doped semiconductor material is also included.

摘要翻译： 用于砷化镓或其他半导体材料的室温湿化学数字蚀刻技术。 在两步蚀刻循环中使用过氧化氢和酸，以大约15个ANGSTROM限制的增量去除砷化镓。 在该循环的第一步中，砷化镓被例如30％的过氧化氢氧化，形成扩散限制在例如14-17安培的厚度的氧化物层，持续15秒至120秒 秒。 该循环的第二步是用不会对未氧化砷化镓进行攻击的酸去除该氧化物层。 这些步骤使用新的反应物材料并在每个反应物之后进行清洗（以防止反应物污染），直到获得所需的蚀刻深度为止重复。 实验结果表明了相对于过氧化氢和酸暴露时间的蚀刻速率和工艺不变性。 还包括使用霍尔效应测量来确定所获得的掺杂半导体材料的表面层厚度的变化的方法。