公开(公告)号：US09190523B2

公开(公告)日：2015-11-17

申请号：US13554393

申请日：2012-07-20

申请人： Byung Du Ahn ,  Je Hun Lee ,  Sei-Yong Park ,  Jun Hyun Park ,  Gun Hee Kim ,  Ji Hun Lim ,  Jae Woo Park ,  Jin Seong Park ,  Toshihiro Kugimiya ,  Aya Miki ,  Shinya Morita ,  Tomoya Kishi ,  Hiroaki Tao

发明人： Byung Du Ahn ,  Je Hun Lee ,  Sei-Yong Park ,  Jun Hyun Park ,  Gun Hee Kim ,  Ji Hun Lim ,  Jae Woo Park ,  Jin Seong Park ,  Toshihiro Kugimiya ,  Aya Miki ,  Shinya Morita ,  Tomoya Kishi ,  Hiroaki Tao

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L21/02565 ,  H01L27/1225 ,  H01L29/66969

摘要： An oxide semiconductor includes a first material including at least one selected from the group consisting of zinc (Zn) and tin (Sn), and a second material, where a value acquired by subtracting an electronegativity difference value between the second material and oxygen (O) from the electronegativity difference value between the first material and oxygen (O) is less than about 1.3.

摘要翻译： 氧化物半导体包括包含选自锌（Zn）和锡（Sn）中的至少一种的第一材料和第二材料，其中通过减去第二材料和氧之间的电负性差值获得的值（O ）从第一材料和氧（O）之间的电负性差值小于约1.3。

公开(公告)号：US09093542B2

公开(公告)日：2015-07-28

申请号：US14113322

申请日：2012-04-19

申请人： Takeaki Maeda ,  Toshihiro Kugimiya ,  Jun Ho Song ,  Je Hun Lee ,  Byung Du Ahn ,  Gun Hee Kim

发明人： Takeaki Maeda ,  Toshihiro Kugimiya ,  Jun Ho Song ,  Je Hun Lee ,  Byung Du Ahn ,  Gun Hee Kim

IPC分类号： H01L29/10 ,  H01L29/786 ,  G02F1/1368 ,  H01L27/12

CPC分类号： H01L29/7869 ,  G02F1/1368 ,  H01L27/1222 ,  H01L29/78693

摘要： There is provided an oxide semiconductor layer capable of making stable the electric characteristics of a thin-film transistor without requiring an oxidatively-treated layer when depositing a passivation layer or the like in display devices such as organic EL displays and liquid crystal displays. The thin-film transistor structure of the present invention at least having, on a substrate, an oxide semiconductor layer, a source-drain electrode, and a passivation layer in order from the substrate side, wherein the oxide semiconductor layer is a stacked product of a first oxide semiconductor layer and a second oxide semiconductor layer; the first oxide semiconductor layer has a Zn content of 50 atomic % or more as a percentage of all metal elements contained therein, and the first oxide semiconductor layer is formed on the source-drain electrode and passivation layer side; the second oxide semiconductor layer contains Sn and at least one element selected from the group consisting of In, Ga, and Zn, and the second oxide semiconductor layer is formed on the substrate side; and the first oxide semiconductor layer is in direct contact both with the source-drain electrode and with the passivation layer.

摘要翻译： 提供了一种氧化物半导体层，当在有机EL显示器和液晶显示器等显示装置中沉积钝化层等时，能够使薄膜晶体管的电特性稳定，而不需要氧化处理层。 本发明的薄膜晶体管结构至少在衬底上具有氧化物半导体层，源 - 漏电极和钝化层，从衬底侧开始，其中氧化物半导体层是 第一氧化物半导体层和第二氧化物半导体层; 第一氧化物半导体层的Zn含量占所有金属元素的百分比为50原子％以上，第一氧化物半导体层形成在源 - 漏电极和钝化层侧; 所述第二氧化物半导体层含有Sn和选自In，Ga和Zn中的至少一种元素，并且所述第二氧化物半导体层形成在所述基板侧; 并且第一氧化物半导体层与源 - 漏电极和钝化层直接接触。

公开(公告)号：US08952376B2

公开(公告)日：2015-02-10

申请号：US13049547

申请日：2011-03-16

申请人： Je-Hun Lee ,  Joo-Han Kim

发明人： Je-Hun Lee ,  Joo-Han Kim

IPC分类号： H01L29/10 ,  H01L29/12 ,  H01L31/00 ,  H01L29/786 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/78648 ,  H01L29/78696

摘要： A thin film transistor and a method of manufacturing the same are provided. The thin film transistor includes a first gate electrode and an active layer including a crystalline oxide semiconductor which is insulated from the first gate electrode by a first insulating layer and the active layer is arranged to overlap the first gate electrode. A source electrode is formed including at least a portion overlaps the active layer, and a drain electrode is arranged being spaced apart from the source electrode and at least a portion of the drain electrode overlaps the active layer, wherein the source electrode and the drain electrode are insulated from the first gate electrode by the first insulating layer.

摘要翻译： 提供薄膜晶体管及其制造方法。 薄膜晶体管包括第一栅电极和有源层，其包括通过第一绝缘层与第一栅电极绝缘的结晶氧化物半导体，并且有源层布置成与第一栅电极重叠。 源极电极形成为包括至少一部分与有源层重叠的部分，并且排列电极被布置成与源电极间隔开，并且漏电极的至少一部分与有源层重叠，其中源电极和漏电极 通过第一绝缘层与第一栅极绝缘。

公开(公告)号：US20130208712A1

公开(公告)日：2013-08-15

申请号：US13615382

申请日：2012-09-13

申请人： Je Hun LEE ,  Sok Kyu Lee ,  Hyun Kyu Chung

发明人： Je Hun LEE ,  Sok Kyu Lee ,  Hyun Kyu Chung

IPC分类号： H04W4/22

CPC分类号： H04W4/12 ,  H04L63/0876 ,  H04W4/06 ,  H04W4/90 ,  H04W12/04 ,  H04W84/12 ,  H04W88/08

摘要： A method of operating a disaster prevention system by a disaster prevention center is provided. The method includes: receiving a disaster situation generation report message including disaster information from a user equipment via an access point (AP); generating disaster response information based on the disaster information; and transmitting a disaster broadcasting message including the disaster response information to the disaster prevention center through the AP.

摘要翻译： 提供了防灾中心运行防灾系统的方法。 该方法包括：经由接入点（AP）从用户设备接收包含灾难信息的灾害情况生成报告消息; 根据灾害信息生成灾害响应信息; 并通过AP向防灾中心发送包含灾害响应信息的灾难广播消息。

公开(公告)号：US08501551B2

公开(公告)日：2013-08-06

申请号：US13608981

申请日：2012-09-10

申请人： Do-Hyun Kim ,  Je-Hun Lee ,  Pil-Sang Yun ,  Dong-Hoon Lee ,  Bong-Kyun Kim

发明人： Do-Hyun Kim ,  Je-Hun Lee ,  Pil-Sang Yun ,  Dong-Hoon Lee ,  Bong-Kyun Kim

IPC分类号： H01L21/00

CPC分类号： H01L27/1225 ,  H01L29/7869

摘要： A thin film transistor array substrate having a high charge mobility and that can raise a threshold voltage, and a method of fabricating the thin film transistor array substrate are provided. The thin film transistor array substrate includes: an insulating substrate; a gate electrode formed on the insulating substrate; an oxide semiconductor layer comprising a lower oxide layer formed on the gate electrode and an upper oxide layer formed on the lower oxide layer, such that the oxygen concentration of the upper oxide layer is higher than the oxygen concentration of the lower oxide layer; and a source electrode and a drain electrode formed on the oxide semiconductor layer and separated from each other.

摘要翻译： 提供具有高电荷迁移率并且可以提高阈值电压的薄膜晶体管阵列基板，以及制造薄膜晶体管阵列基板的方法。 薄膜晶体管阵列基板包括：绝缘基板; 形成在所述绝缘基板上的栅电极; 氧化物半导体层，其包括形成在所述栅电极上的低氧化物层和形成在所述低氧化物层上的上氧化物层，使得所述上氧化物层的氧浓度高于所述低氧化物层的氧浓度; 以及形成在氧化物半导体层上并且彼此分离的源电极和漏电极。

公开(公告)号：US08455277B2

公开(公告)日：2013-06-04

申请号：US13523767

申请日：2012-06-14

申请人： Je-Hun Lee ,  Sung-Jin Kim ,  Hee-Joon Kim ,  Chang-Oh Jeong

发明人： Je-Hun Lee ,  Sung-Jin Kim ,  Hee-Joon Kim ,  Chang-Oh Jeong

IPC分类号： H01L21/84

CPC分类号： G02F1/13439 ,  G02F1/13458 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908

摘要： A thin film transistor array panel is provided, which includes a plurality of gate lines, a plurality of common electrodes, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer, a plurality of drain electrodes formed on the semiconductor layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn is not produced on the surfaces of the common electrode.

摘要翻译： 提供薄膜晶体管阵列面板，其包括多个栅极线，多个公共电极，覆盖栅极线和公共电极的栅极绝缘层，形成在栅极绝缘层上的多个半导体层，多个 包括多个源电极并形成在半导体层上的数据线，形成在半导体层上的多个漏电极以及与公共电极重叠并连接到漏电极的多个像素电极。 由于公共电极由ITON，IZON或者-IONON制成，或者是将双重层的ITO / ITON，IZO / IZON或者a-ITO / a-ITON，当注入H 2或SiH 4以形成氮化硅时 SiNX）层，在公共电极的表面上不产生不透明金属Sn或Zn。

公开(公告)号：US08372701B2

公开(公告)日：2013-02-12

申请号：US12576217

申请日：2009-10-08

申请人： Je-Hun Lee ,  Yang-Ho Bae ,  Beom-Seok Cho ,  Chang-Oh Jeong

发明人： Je-Hun Lee ,  Yang-Ho Bae ,  Beom-Seok Cho ,  Chang-Oh Jeong

IPC分类号： H01L21/00

CPC分类号： H01L27/1214 ,  H01L27/1225 ,  H01L27/124

摘要： The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).

公开(公告)号：US20120323542A1

公开(公告)日：2012-12-20

申请号：US13481579

申请日：2012-05-25

申请人： Je-Hun LEE ,  Byung-Du AHN ,  Sei-Yong PARK ,  Jun-Hyun PARK ,  Jae-Woo PARK ,  Dae-Hwan KIM ,  Sung-Chul KIM ,  Yong-Woo JEON

发明人： Je-Hun LEE ,  Byung-Du AHN ,  Sei-Yong PARK ,  Jun-Hyun PARK ,  Jae-Woo PARK ,  Dae-Hwan KIM ,  Sung-Chul KIM ,  Yong-Woo JEON

IPC分类号： G06G7/62

CPC分类号： G06F17/5036

摘要： A method for calculating values of parameters of a TFT includes calculating a set of simulated current-voltage (I-V) values using state-density-functions over an entire energy band in a band gap of an amorphous semiconductor of the TFT. The method further includes comparing the set of simulated I-V values with a set of measured I-V values of the TFT to determine a value of a parameter of the TFT. The method may further include calculating values of an acceptor state-density-function gA using a set of electrostatic capacity-voltage (C-V) values of the TFT measured according to a frequency. The method may further include determining values of a donor state-density-function gD and values of an interface state-density-function Dit over the entire energy band in the band gap.

摘要翻译： 用于计算TFT的参数值的方法包括使用TFT的非晶半导体的带隙中的整个能带上的状态密度函数来计算一组模拟电流 - 电压（I-V）值。 所述方法还包括将所述一组模拟I-V值与所述TFT的测量I-V值的集合进行比较，以确定所述TFT的参数的值。 该方法还可以包括使用根据频率测量的TFT的一组静电电容电压（C-V）值来计算受主状态密度函数gA的值。 该方法还可以包括在带隙中的整个能带上确定施主状态密度函数gD的值和接口状态密度函数Dit的值。

公开(公告)号：US08330916B2

公开(公告)日：2012-12-11

申请号：US12344075

申请日：2008-12-24

申请人： Je-Hun Lee ,  Do-Hyun Kim ,  Tae-Sang Kim ,  Kyung-Seok Son ,  Chang-Oh Jeong

发明人： Je-Hun Lee ,  Do-Hyun Kim ,  Tae-Sang Kim ,  Kyung-Seok Son ,  Chang-Oh Jeong

IPC分类号： G02F1/1343

CPC分类号： H01L33/0095 ,  G02F1/133512 ,  G02F1/133516 ,  G02F1/136209 ,  G02F1/1368 ,  G02F2001/133397 ,  G02F2001/136222 ,  G02F2001/136231 ,  G02F2001/13685 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458

摘要： A liquid crystal display (LCD) includes thin film transistors (TFTs) each having spaced apart source/drain electrodes and an oxide-type semiconductive film disposed over and between the source/drain electrodes to define an active layer. Each of the source/drain electrodes includes a portion of a subdivided transparent conductive layer where one subdivision of the transparent conductive layer continues from within its one of the source/drain electrodes to define an optically exposed pixel-electrode that is reliably connected integrally to the one source/drain electrode. Mass production costs can be reduced and production reliability increased because a fewer number of photolithographic masks can be used to form the TFTs.

摘要翻译： 液晶显示器（LCD）包括薄膜晶体管（TFT），每个薄膜晶体管具有间隔开的源/漏电极和设置在源/漏电极之间和之间的氧化物型半导体膜，以限定有源层。 源/漏电极中的每一个包括细分透明导电层的一部分，其中透明导电层的一个细分从其源极/漏极之一内延伸，以限定光学曝光的像素电极，其可靠地与 一个源/漏电极。 由于可以使用较少数量的光刻掩模来形成TFT，所以可以降低批量生产成本并提高生产可靠性。

公开(公告)号：US08288771B2

公开(公告)日：2012-10-16

申请号：US13204553

申请日：2011-08-05

申请人： Je-Hun Lee ,  Sung-Jin Kim ,  Hee-Joon Kim ,  Chang-Oh Jeong

发明人： Je-Hun Lee ,  Sung-Jin Kim ,  Hee-Joon Kim ,  Chang-Oh Jeong

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L21/84

CPC分类号： G02F1/13439 ,  G02F1/13458 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908

摘要： A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the metal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode.