公开(公告)号：US20110145628A1

公开(公告)日：2011-06-16

申请号：US12964420

申请日：2010-12-09

申请人： Jeffrey T. Wilson

发明人： Jeffrey T. Wilson

IPC分类号： G06F11/20 ,  G06F11/30

CPC分类号： G06F11/3604 ,  G06F11/008 ,  G06F11/3055 ,  G06F11/3692 ,  G06Q30/02 ,  G06Q30/0241 ,  H04L67/02

摘要： Computer-implemented methods and systems are provided for scanning web sites and/or parsing web content, including for testing online opt-out systems and/or cookies used by online systems. In accordance with one implementation, a computer-implemented method is provided for testing an opt-out system associated with at least one advertising system that uses cookies. The method includes transmitting a first request to an opt-out system, wherein the first request corresponds to a first test for testing at least one of the opt-out system and an advertising system; receiving a first stream sent in response to the first request; determining a first outcome of the first test based on the first stream; and generating a report based on the first outcome.

摘要翻译： 提供了计算机实现的方法和系统，用于扫描网站和/或解析Web内容，包括用于在线选择退出系统和/或在线系统使用的cookie的测试。 根据一个实现，提供了一种计算机实现的方法来测试与至少一个使用cookie的广告系统相关联的选择退出系统。 该方法包括向选择退出系统发送第一请求，其中第一请求对应于用于测试选择退出系统和广告系统中的至少一个的第一测试; 接收响应于所述第一请求而发送的第一流; 基于第一流确定第一测试的第一结果; 并根据第一个结果生成报告。

公开(公告)号：USD325561S

公开(公告)日：1992-04-21

申请号：US571428

申请日：1990-08-23

申请人： Jeffrey T. Wilson

设计人： Jeffrey T. Wilson

公开(公告)号：US6101566A

公开(公告)日：2000-08-08

申请号：US41606

申请日：1998-03-13

申请人： Robert Woods ,  Jeff W. Wolford ,  Jeffrey C. Stevens ,  Shaun Wandler ,  Todd Deschepper ,  Jeffrey T. Wilson ,  Danny Higby ,  Russ Wunderlich

发明人： Robert Woods ,  Jeff W. Wolford ,  Jeffrey C. Stevens ,  Shaun Wandler ,  Todd Deschepper ,  Jeffrey T. Wilson ,  Danny Higby ,  Russ Wunderlich

IPC分类号： G06F13/38 ,  G06F13/40 ,  G06F13/14

CPC分类号： G06F13/385 ,  G06F13/4027

摘要： A computer system includes a CPU and a memory device coupled by a North bridge logic unit to an expansion bus, such as a PCI bus. A South bridge logic connects to the expansion bus and couples various secondary busses and peripheral devices to the expansion bus. The South bridge logic includes internal control devices that are targets for masters on the expansion bus. The target devices couple to the expansion bus through a common expansion target interface, which monitors and translates master cycles on the expansion bus on behalf of the target devices. The South bridge also includes an internal modular target expansion bus coupling the internal target devices to the common target interface. The internal modular target expansion bus permits the target devices to receive master cycles from any expansion bus by understanding a standardized group of signals represented by the internal modular target expansion (IMAX) bus. The target interface then is responsible for understanding the protocol of the expansion bus and converting the expansion bus signals to IMAX target bus signals. The IMAX target bus includes both an inbound bus and an outbound data bus for driving out data requested as part of a read cycle to an internal target device.

摘要翻译： 计算机系统包括CPU和由北桥逻辑单元耦合到诸如PCI总线的扩展总线的存储器件。 南桥逻辑连接到扩展总线，并将各种辅助总线和外围设备耦合到扩展总线。 南桥逻辑包括作为扩展总线主机的目标的内部控制设备。 目标设备通过公共扩展目标接口耦合到扩展总线，该接口监视和翻译扩展总线上的主周期，代表目标设备。 南桥还包括将内部目标设备耦合到通用目标接口的内部模块化目标扩展总线。 内部模块化目标扩展总线允许目标设备通过理解由内部模块化目标扩展（IMAX）总线表示的标准化信号组来从任何扩展总线接收主周期。 目标接口然后负责理解扩展总线的协议，并将扩展总线信号转换为IMAX目标总线信号。 IMAX目标总线包括入站总线和出站数据总线，用于将作为读周期的一部分请求的数据驱出到内部目标设备。

公开(公告)号：US06226700B1

公开(公告)日：2001-05-01

申请号：US09042173

申请日：1998-03-13

申请人： Shaun Wandler ,  Jeffrey C. Stevens ,  Jeff W. Wolford ,  Robert Woods ,  Danny Higby ,  Russ Wunderlich ,  Todd Deschepper ,  Jeffrey T. Wilson

发明人： Shaun Wandler ,  Jeffrey C. Stevens ,  Jeff W. Wolford ,  Robert Woods ,  Danny Higby ,  Russ Wunderlich ,  Todd Deschepper ,  Jeffrey T. Wilson

IPC分类号： G06F1340

CPC分类号： G06F13/4045

摘要： A computer system includes a CPU and a memory device coupled by a North bridge logic unit to an expansion bus, such as a PCI bus. A South bridge logic connects to the expansion bus and couples various secondary busses and peripheral devices to the expansion bus. The South bridge logic includes internal control devices or master devices that are designed to run master cycles on the expansion bus. The master devices couple to the expansion bus through a common expansion master interface, which executes master cycles on the expansion bus on behalf of the master devices. The South bridge also includes an internal modular master expansion bus coupling the internal master devices to the common master interface. The internal modular master expansion bus permits the master devices to run master cycles to any expansion bus by understanding a standardized group of signals represented by the internal modular master expansion (IMAX) bus. The master interface then is responsible for understanding the protocol of the expansion bus and converting the IMAX master bus signals to signals compatible with the expansion bus. In addition, a dedicated target IMAX bus may also be provided for coupling internal targets within the South bridge to masters on the expansion bus through a common expansion target interface.

摘要翻译： 计算机系统包括CPU和由北桥逻辑单元耦合到诸如PCI总线的扩展总线的存储器件。 南桥逻辑连接到扩展总线，并将各种辅助总线和外围设备耦合到扩展总线。 南桥逻辑包括设计用于在扩展总线上运行主站周期的内部控制设备或主设备。 主器件通过公共扩展主接口耦合到扩展总线，该接口代表主器件在扩展总线上执行主器件周期。 南桥还包括将内部主设备连接到公共主接口的内部模块化主扩展总线。 内部模块化主扩展总线允许主器件通过了解由内部模块化主扩展（IMAX）总线表示的标准化信号组，将主周期运行到任何扩展总线。 然后，主接口负责了解扩展总线的协议，并将IMAX主总线信号转换为与扩展总线兼容的信号。 此外，还可以提供专用目标IMAX总线，用于通过公共扩展目标接口将南桥内的内部目标耦合到扩展总线上的主设备。

公开(公告)号：US06212590B1

公开(公告)日：2001-04-03

申请号：US09042038

申请日：1998-03-13

申请人： Maria L. Melo ,  Todd Deschepper ,  Jeffrey T. Wilson

发明人： Maria L. Melo ,  Todd Deschepper ,  Jeffrey T. Wilson

IPC分类号： G06F1336

CPC分类号： G06F13/362 ,  G06F13/4031

摘要： A computer system includes a secondary bus bridge device in a portable computer and a another secondary bus bridge device in an expansion base to which the portable computer connects (docks). A peripheral in the expansion base may initiate a delayed cycle to read or write data to memory through a primary bus bridge device that also couples to a CPU. Both secondary bus bridge devices include an arbiter for controlling arbitration of a peripheral bus that connects both secondary bridge devices. The arbiter in the secondary bridge of the portable computer determines which of the arbiters will have arbitration control of the expansion bus to run cycles. When read data is available, in the case of a delayed read cycle initiated by a peripheral device in the expansion base, the primary bridge strobes a delayed cycle control signal to the arbiter in the portable computer which then gives arbitration control to the arbiter in the expansion base.

摘要翻译： 计算机系统包括便携式计算机中的辅助总线桥接器件以及便携式计算机连接（扩展坞）的扩展基座中的另一辅助总线桥接器件。 扩展基站中的外围设备可能会启动延迟周期，以便通过也耦合到CPU的主总线桥接器件将数据读取或写入存储器。 辅助总线桥接器件包括用于控制连接两个次级桥接器件的外围总线仲裁的仲裁器。 便携式计算机的次级桥中的仲裁器确定哪个仲裁者将对扩展总线进行仲裁控制以运行周期。 当读取数据可用时，在由扩展基站中的外围设备发起的延迟读周期的情况下，主桥选择延迟的周期控制信号给便携式计算机中的仲裁器，然后仲裁器向仲裁器提供仲裁控制 扩建基地

公开(公告)号：US5627962A

公开(公告)日：1997-05-06

申请号：US366509

申请日：1994-12-30

申请人： Alan L. Goodrum ,  Gary B. Kotzur ,  Kurt C. Lantz ,  David F. Heinrich ,  Jeffrey T. Wilson

发明人： Alan L. Goodrum ,  Gary B. Kotzur ,  Kurt C. Lantz ,  David F. Heinrich ,  Jeffrey T. Wilson

IPC分类号： G06F1/26 ,  G06F11/14 ,  G06F15/177 ,  G01R31/28 ,  G06F11/00

CPC分类号： G06F15/177 ,  G06F1/26 ,  G06F11/1417

摘要： A hot spare boot circuit that automatically switches from a non-operational CPU to an operational CPU for powering up the computer system. In the multiprocessor computer system, a first CPU is designated to perform power on operations. If the first CPU fails, which is determined when a dead man counter in the hot spare boot circuit times out, the hot spare circuit ensures that the first CPU is in a disabled state. Next, the hot spare boot circuit identifies an operational second CPU, reinitializing certain ID information as necessary such that the second CPU can properly perform power on operations. The hot spare boot then awakens the second CPU, using a startup interprocessor interrupt in one embodiment, or simply negating the hard reset of the second CPU in a second embodiment. The second CPU then proceeds to perform the power on functions.

摘要翻译： 一个热备用引导电路，可自动从非操作CPU切换到运行CPU，以便为计算机系统供电。 在多处理器计算机系统中，指定第一CPU执行上电操作。 如果第一个CPU出现故障，当热备用引导电路中的死亡计数器超时时确定，热备用电路确保第一个CPU处于禁用状态。 接下来，热备用引导电路识别操作的第二CPU，根据需要重新初始化某些ID信息，使得第二CPU可以正常地执行上电操作。 热备用引导然后在一个实施例中唤醒第二CPU，使用启动处理器中断，或者在第二实施例中简单地否定第二CPU的硬复位。 然后第二个CPU继续执行上电功能。

公开(公告)号：US08793614B2

公开(公告)日：2014-07-29

申请号：US12126770

申请日：2008-05-23

申请人： Jeffrey T. Wilson ,  Mark H. Goldstein

发明人： Jeffrey T. Wilson ,  Mark H. Goldstein

IPC分类号： G06F3/048

CPC分类号： G06F17/30899 ,  G06F17/30864

摘要： A process is disclosed for using the existing Universal Resource Identifier (URI) history feature of browsers to maintain user preference settings, or other state information, used by one or more web sites or other systems. In one embodiment, when a user makes a particular preference selection on a web site, the user's selection is recorded in the browser's URI history by causing the browser to access a URI (or a set of URIs) representing the particular selection. The same or a different web site may subsequently test the browser's URI history for this particular URI by including appropriate JavaScript or other executable code in a page requested by the browser. Depending upon the outcome of this test, the web site and/or the page's executable code may take an appropriate action or inaction consistent with the preference selection.

摘要翻译： 公开了使用浏览器的现有通用资源标识符（URI）历史特征来维护一个或多个网站或其他系统使用的用户偏好设置或其他状态信息的过程。 在一个实施例中，当用户在网站上进行特定偏好选择时，通过使浏览器访问表示特定选择的URI（或一组URI），将用户的选择记录在浏览器的URI历史中。 相同或不同的网站可以随后通过在浏览器请求的页面中包括适当的JavaScript或其他可执行代码来测试浏览器的URI历史记录。 根据该测试的结果，网站和/或页面的可执行代码可以采取与偏好选择一致的适当的动作或不作为。

公开(公告)号：US08549357B2

公开(公告)日：2013-10-01

申请号：US12964420

申请日：2010-12-09

申请人： Jeffrey T. Wilson

发明人： Jeffrey T. Wilson

IPC分类号： G06F11/00

CPC分类号： G06F11/3604 ,  G06F11/008 ,  G06F11/3055 ,  G06F11/3692 ,  G06Q30/02 ,  G06Q30/0241 ,  H04L67/02

摘要： Computer-implemented methods and systems are provided for scanning web sites and/or parsing web content, including for testing online opt-out systems and/or cookies used by online systems. In accordance with one implementation, a computer-implemented method is provided for testing an opt-out system associated with at least one advertising system that uses cookies. The method includes transmitting a first request to an opt-out system, wherein the first request corresponds to a first test for testing at least one of the opt-out system and an advertising system; receiving a first stream sent in response to the first request; determining a first outcome of the first test based on the first stream; and generating a report based on the first outcome.

摘要翻译： 提供了计算机实现的方法和系统，用于扫描网站和/或解析Web内容，包括用于在线选择退出系统和/或在线系统使用的cookie的测试。 根据一个实现，提供了一种计算机实现的方法来测试与至少一个使用cookie的广告系统相关联的选择退出系统。 该方法包括向选择退出系统发送第一请求，其中第一请求对应于用于测试选择退出系统和广告系统中的至少一个的第一测试; 接收响应于所述第一请求而发送的第一流; 基于第一流确定第一测试的第一结果; 并根据第一个结果生成报告。