摘要:
A hot spare boot circuit that automatically switches from a non-operational CPU to an operational CPU for powering up the computer system. In the multiprocessor computer system, a first CPU is designated to perform power on operations. If the first CPU fails, which is determined when a dead man counter in the hot spare boot circuit times out, the hot spare circuit ensures that the first CPU is in a disabled state. Next, the hot spare boot circuit identifies an operational second CPU, reinitializing certain ID information as necessary such that the second CPU can properly perform power on operations. The hot spare boot then awakens the second CPU, using a startup interprocessor interrupt in one embodiment, or simply negating the hard reset of the second CPU in a second embodiment. The second CPU then proceeds to perform the power on functions.
摘要:
An electronic system includes a fan and a fan controller connected to the fan to control a speed of the fan. The fan controller has storage locations for storing thermal data used by the fan controller to control the speed of the fan. A thermal sensor generates a first portion of the thermal data, which is readable by the fan controller, and which the fan controller stores in a first portion of the storage locations. A device generates a second portion of the thermal data, which is not readable by the fan controller. An agent writes the second portion of the thermal data to a second portion of the storage locations.
摘要:
An intelligent air moving apparatus for cooling an electronics enclosure includes a motor for driving a fan at a variable rotational speed and a microcontroller for controlling the rotational speed of the motor. The microcontroller includes a speed sensor for sensing the rotational speed such that when the sensed rotational speed deviates below a target speed, the microcontroller detects a locked rotor condition.
摘要:
A remote management controller may include a capture engine and a processor. The capture engine may be configured to: obtain a slice of video data output from a video graphics controller; calculate at least one value correlative to the slice of video data; determine whether any portion of the slice has been locked; and if any portion has not been locked and if the calculated value for such portion of the slice differs from a value for a previously obtained corresponding portion, move the portion to a virtual screen buffer, update a table associated with the virtual screen buffer with the calculated value, and modify a change table to indicate that the portion has changed. The processor may be configured to: read the change table to determine whether any portion of video data in the virtual screen buffer has changed; and if any portion has changed, lock any changed portion from being accessed by the capture engine, access the changed portion from the virtual screen buffer, and process the changed portion in the virtual screen buffer for transmission to a remote system.
摘要:
A method for initializing a memory subsystem (212) of a management controller (200) includes, with an additional memory initialization module (206) of the management controller (200), initializing the memory subsystem (212) of the management controller (200) in response to the memory subsystem (212) not being properly initialized. A management controller (200) includes a memory subsystem (212) including a memory controller (214) and a memory (216); firmware (208) able to initialize the memory subsystem (212); and a memory initialization module (206) to initialize the memory subsystem (212) if the memory subsystem (212) is not properly initialized.
摘要:
A system comprising a memory subsystem having at least one memory device, and a memory controller to control access of the memory subsystem, wherein the memory controller is configured to store data with error correction code (ECC) information in a first portion of the memory subsystem, and to store data without ECC information in a second portion of the memory subsystem.
摘要:
The specification may disclose a computer system that may have two memory boards operated in a mirrored mode. The computer system may have the ability to operate in a mirrored mode with the memory boards having varying amounts of memory. This feature may allow for adding main memory to the computer system while the computer system is operational.
摘要:
A computer system, bus interface unit, and method are provided for securing certain devices connected to an I2C bus. Those devices include any device which contains sensitive information or passwords. For example, a device controlled by a I2C-connected device bay controller may contain sensitive files, data, and information to which improper access may be denied by securing the device bay controller. Moreover, improper accesses to passwords contained in non-volatile memory connected to the I2C bus must also be prevented. A bus interface unit coupled within the computer contains registers, and logic which compares the incoming I2C target and word addresses with coded bits within fields of those registers. If the target or word address is to a protected address or range of addresses, then an unlock signal must be issued before the security control logic will allow the target or word address to access the I2C bus or addressed device thereon. The unlock signal can be assigned to a particular slot among numerous slots, wherein the slots are arranged in hierarchical order. This allows a system administrator the capability to unlock accesses to protected non-volatile memory, and thereby allowing the system administrator to change passwords within one portion of non-volatile memory, and possibly allowing a lower priority user to access and change a password within another portion of non-volatile memory. The slot which accommodates an unlock signal assigned to the system administrator is altogether separate from a slot assigned to a non-system administrator or user.
摘要:
A computer system according to the present invention implements a self-modifying “fail-safe” password system that allows a manufacturer or site administrator to securely supply a single-use password to users who lose a power-up password. The fail-safe password system utilizes at least one fail-safe counter, an encryption/decryption algorithm, a public key, and a secure non-volatile memory space. The fail-safe password is derived by generating a hash code using SHA, MD5,or a similar algorithm and encrypting the result. The fail-safe password is then communicated to the user. After the user enters the fail-safe password, the computer system generates an internal hash value and compares it with the hash code of the decrypted fail-safe password. When the decrypted fail-safe password matches the internal hash value, the user is allowed access to the computer system.
摘要:
A method for supporting multiple distributed interrupt controllers, designated as bus agents, in a symmetric multiprocessing system, which method includes the steps of assigning a unique identification number to each bus agent, receiving bus requests from the bus agents over four data lines in groups of four, and granting bus ownership to a selected one of the requesting bus agents. Similarly, a computer system that supports multiple distributed interrupt controllers, designated as bus agents, in a symmetric multiprocessing system, which computer system includes structure for assigning a unique identification number to each bus agent, four data lines for receiving bus requests from the bus agents in groups of four, and structure for granting bus ownership to a selected one of the requesting bus agents.