公开(公告)号：US08645876B2

公开(公告)日：2014-02-04

申请号：US13234117

申请日：2011-09-15

申请人： Wye Boon Loh ,  Jeoung Mo Koo ,  Paul Kim Cheong Soh ,  Beng Lye Oh ,  Purakh Raj Verma

发明人： Wye Boon Loh ,  Jeoung Mo Koo ,  Paul Kim Cheong Soh ,  Beng Lye Oh ,  Purakh Raj Verma

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： There is provided a method comprising receiving data corresponding to a layout design for a plurality of input mask layers and generating a layout design for at least one generated mask layer. The relationship between a first geometric element in a first layout pattern comprising one or more of the generated mask layers and a second geometric element in a second layout pattern is then determined and verified to check if they comply with predetermined rules. If the relationship does not conform with the predetermined rules the design of at least one of the generated mask layers associated with the first or second layout pattern is modified.

摘要翻译： 提供了一种方法，包括接收对应于多个输入掩模层的布局设计的数据，并且生成用于至少一个生成的掩模层的布局设计。 然后确定并验证包括生成的掩模层中的一个或多个的第一布局图案中的第一几何元素与第二布局图案中的第二几何元素之间的关系，以检查它们是否符合预定规则。 如果关系不符合预定规则，则修改与第一或第二布局图案相关联的所生成的掩模层中的至少一个的设计。

公开(公告)号：US08410553B2

公开(公告)日：2013-04-02

申请号：US12964753

申请日：2010-12-10

申请人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Sanford Chu ,  Chunlin Zhu ,  Yisuo Li

发明人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Sanford Chu ,  Chunlin Zhu ,  Yisuo Li

IPC分类号： H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/105 ,  H01L29/66568 ,  H01L29/7833

摘要： A high voltage device includes a substrate with a device region defined thereon. A gate stack is disposed on the substrate in the device region. A channel region is located in the substrate beneath the gate stack, while a first diffusion region is located in the substrate on a first side of the gate stack. A first isolation structure in the substrate, located on the first side of the gate stack, separates the channel and the first diffusion region. The high voltage device also includes a first drift region in the substrate coupling the channel to the first diffusion region, wherein the first drift region comprises a non-uniform depth profile conforming to a profile of the first isolation structure.

摘要翻译： 高压器件包括其上限定有器件区域的衬底。 栅极堆叠设置在器件区域中的衬底上。 沟道区域位于栅堆叠下方的衬底中，而第一扩散区位于栅层叠的第一侧上的衬底中。 位于栅极堆叠的第一侧的衬底中的第一隔离结构分离通道和第一扩散区域。 高电压装置还包括在衬底中的第一漂移区域，其将沟道耦合到第一扩散区域，其中第一漂移区域包括符合第一隔离结构的轮廓的不均匀的深度分布。

公开(公告)号：US07259419B2

公开(公告)日：2007-08-21

申请号：US10799201

申请日：2004-03-12

申请人： Jeoung-Mo Koo ,  Hee-Seon Oh

发明人： Jeoung-Mo Koo ,  Hee-Seon Oh

IPC分类号： H01L29/76

CPC分类号： H01L29/42324 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L29/66825

摘要： An integrated circuit comprises a memory device including an isolation layer for defining an active area of a substrate, a tunnel oxide layer formed on the active area, a floating gate formed over the active area and the isolation layer, an inter-gate dielectric layer formed on the floating gate, and a control gate formed on the inter-gate dielectric layer. The integrated circuit also includes a high and low voltage transistors.

摘要翻译： 集成电路包括存储器件，其包括用于限定衬底的有源区的隔离层，形成在有源区上的隧道氧化层，在有源区上形成的浮置栅和隔离层，形成栅间电介质层 并且在栅极间电介质层上形成控制栅极。 集成电路还包括高压和低压晶体管。

公开(公告)号：US20110079850A1

公开(公告)日：2011-04-07

申请号：US12964753

申请日：2010-12-10

申请人： Jeoung Mo KOO ,  Purakh Raj VERMA ,  Sanford CHU ,  Chunlin ZHU ,  Yisuo LI

发明人： Jeoung Mo KOO ,  Purakh Raj VERMA ,  Sanford CHU ,  Chunlin ZHU ,  Yisuo LI

IPC分类号： H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/105 ,  H01L29/66568 ,  H01L29/7833

摘要： A high voltage device includes a substrate with a device region defined thereon. A gate stack is disposed on the substrate in the device region. A channel region is located in the substrate beneath the gate stack, while a first diffusion region is located in the substrate on a first side of the gate stack. A first isolation structure in the substrate, located on the first side of the gate stack, separates the channel and the first diffusion region. The high voltage device also includes a first drift region in the substrate coupling the channel to the first diffusion region, wherein the first drift region comprises a non-uniform depth profile conforming to a profile of the first isolation structure.

摘要翻译： 高压器件包括其上限定有器件区域的衬底。 栅极堆叠设置在器件区域中的衬底上。 沟道区域位于栅堆叠下方的衬底中，而第一扩散区位于栅层叠的第一侧上的衬底中。 位于栅极堆叠的第一侧的衬底中的第一隔离结构分离通道和第一扩散区域。 高电压装置还包括在衬底中的第一漂移区域，其将沟道耦合到第一扩散区域，其中第一漂移区域包括符合第一隔离结构的轮廓的不均匀的深度分布。

公开(公告)号：US09111992B2

公开(公告)日：2015-08-18

申请号：US13231934

申请日：2011-09-13

申请人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Guowei Zhang

发明人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Guowei Zhang

IPC分类号： H01L29/72 ,  H01L21/762 ,  H01L29/78 ,  H01L29/10 ,  H01L21/265 ,  H01L29/06 ,  H01L21/8238

CPC分类号： H01L29/7816 ,  H01L21/26513 ,  H01L21/76224 ,  H01L21/823892 ,  H01L29/0653 ,  H01L29/10 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/7835

摘要： A device comprising a p-type base region, and a p-type region formed over the p-type base region and in contact with the p-type base region is disclosed. The device also includes an n-well region surrounded by the p-type region, wherein the n-well is formed from an n-type epitaxial layer and the p-type region is formed by counter-doping the same n-type epitaxial layer.

摘要翻译： 公开了一种包括p型基极区域和形成在p型基极区域上并与p型基极区域接触的p型区域的器件。 该器件还包括被p型区域围绕的n阱区域，其中n阱由n型外延层形成，并且p型区域通过将相同的n型外延层 。

公开(公告)号：US20130074016A1

公开(公告)日：2013-03-21

申请号：US13234117

申请日：2011-09-15

申请人： Wye Boon LOH ,  Jeoung Mo KOO ,  Paul Kim Cheong SOH ,  Beng Lye OH ,  Purakh Raj VERMA

发明人： Wye Boon LOH ,  Jeoung Mo KOO ,  Paul Kim Cheong SOH ,  Beng Lye OH ,  Purakh Raj VERMA

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： There is provided a method comprising receiving data corresponding to a layout design for a plurality of input mask layers and generating a layout design for at least one generated mask layer. The relationship between a first geometric element in a first layout pattern comprising one or more of the generated mask layers and a second geometric element in a second layout pattern is then determined and verified to check if they comply with predetermined rules. If the relationship does not conform with the predetermined rules the design of at least one of the generated mask layers associated with the first or second layout pattern is modified.

摘要翻译： 提供了一种方法，包括接收对应于多个输入掩模层的布局设计的数据，并为至少一个生成的掩模层生成布局设计。 然后确定并验证包括生成的掩模层中的一个或多个的第一布局图案中的第一几何元素与第二布局图案中的第二几何元素之间的关系，以检查它们是否符合预定规则。 如果关系不符合预定规则，则修改与第一或第二布局图案相关联的所生成的掩模层中的至少一个的设计。

公开(公告)号：US20130062691A1

公开(公告)日：2013-03-14

申请号：US13231934

申请日：2011-09-13

申请人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Guowei Zhang

发明人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Guowei Zhang

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/20

CPC分类号： H01L29/7816 ,  H01L21/26513 ,  H01L21/76224 ,  H01L21/823892 ,  H01L29/0653 ,  H01L29/10 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/7835

摘要： A device comprising a p-type base region, and a p-type region formed over the p-type base region and in contact with the p-type base region is disclosed. The device also includes an n-well region surrounded by the p-type region, wherein the n-well is formed from an n-type epitaxial layer and the p-type region is formed by counter-doping the same n-type epitaxial layer.

公开(公告)号：US07867862B2

公开(公告)日：2011-01-11

申请号：US11855168

申请日：2007-09-14

申请人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Sanford Chu ,  Chunlin Zhu ,  Yisuo Li

发明人： Jeoung Mo Koo ,  Purakh Raj Verma ,  Sanford Chu ,  Chunlin Zhu ,  Yisuo Li

IPC分类号： H01L21/335

CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/105 ,  H01L29/66568 ,  H01L29/7833

摘要： A high voltage device includes a substrate with a device region defined thereon. A gate stack is disposed on the substrate in the device region. A channel region is located in the substrate beneath the gate stack, while a first diffusion region is located in the substrate on a first side of the gate stack. A first isolation structure in the substrate, located on the first side of the gate stack, separates the channel and the first diffusion region. The high voltage device also includes a first drift region in the substrate coupling the channel to the first diffusion region, wherein the first drift region comprises a non-uniform depth profile conforming to a profile of the first isolation structure.

摘要翻译： 高压器件包括其上限定有器件区域的衬底。 栅极堆叠设置在器件区域中的衬底上。 沟道区域位于栅堆叠下方的衬底中，而第一扩散区位于栅层叠的第一侧上的衬底中。 位于栅极堆叠的第一侧的衬底中的第一隔离结构分离通道和第一扩散区域。 高电压装置还包括在衬底中的第一漂移区域，其将沟道耦合到第一扩散区域，其中第一漂移区域包括符合第一隔离结构的轮廓的不均匀的深度分布。

公开(公告)号：US07642592B2

公开(公告)日：2010-01-05

申请号：US11745052

申请日：2007-05-07

申请人： Jeoung-Mo Koo ,  Hee-Seon Oh

发明人： Jeoung-Mo Koo ,  Hee-Seon Oh

IPC分类号： H01L29/76

CPC分类号： H01L29/42324 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L29/66825

摘要： An integrated circuit comprises a memory device including an isolation layer for defining an active area of a substrate, a tunnel oxide layer formed on the active area, a floating gate formed over the active area and the isolation layer, an inter-gate dielectric layer formed on the floating gate, and a control gate formed on the inter-gate dielectric layer. The integrated circuit also includes a high and low voltage transistors.

摘要翻译： 集成电路包括存储器件，其包括用于限定衬底的有源区的隔离层，形成在有源区上的隧道氧化层，在有源区上形成的浮置栅和隔离层，形成栅间电介质层 并且形成在栅极间电介质层上的控制栅极。 集成电路还包括高压和低压晶体管。

公开(公告)号：US20090072310A1

公开(公告)日：2009-03-19

申请号：US11855168

申请日：2007-09-14

申请人： Jeoung Mo KOO ,  Purakh Raj VERMA ,  Sanford CHU ,  Chunlin ZHU ,  Yisuo LI

发明人： Jeoung Mo KOO ,  Purakh Raj VERMA ,  Sanford CHU ,  Chunlin ZHU ,  Yisuo LI

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/105 ,  H01L29/66568 ,  H01L29/7833

摘要： A high voltage device includes a substrate with a device region defined thereon. A gate stack is disposed on the substrate in the device region. A channel region is located in the substrate beneath the gate stack, while a first diffusion region is located in the substrate on a first side of the gate stack. A first isolation structure in the substrate, located on the first side of the gate stack, separates the channel and the first diffusion region. The high voltage device also includes a first drift region in the substrate coupling the channel to the first diffusion region, wherein the first drift region comprises a non-uniform depth profile conforming to a profile of the first isolation structure.

摘要翻译： 高压器件包括其上限定有器件区域的衬底。 栅极堆叠设置在器件区域中的衬底上。 沟道区域位于栅堆叠下方的衬底中，而第一扩散区位于栅层叠的第一侧上的衬底中。 位于栅极堆叠的第一侧的衬底中的第一隔离结构分离通道和第一扩散区域。 高电压装置还包括在衬底中的第一漂移区域，其将沟道耦合到第一扩散区域，其中第一漂移区域包括符合第一隔离结构的轮廓的不均匀的深度分布。