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公开(公告)号：US5736902A
公开(公告)日：1998-04-07
申请号：US684193
申请日：1996-07-19
Applicant: Jerald G. Graeme
Inventor： Jerald G. Graeme
CPC classification number: H03F3/3066 , H03F3/343
Abstract: A high gain common-emitter output stage for an amplifier is disclosed. In one embodiment, an output stage for an amplifier circuit according to the invention includes: a first transistor having a base, an emitter and a collector, the emitter being connected to a first potential through a first resistor, the collector being connected to a second potential through a series connection of a second resistor and a bias current source, the base being connected between the second resistor and the bias current; a second transistor having a base, an emitter and a collector, the emitter being connected to the first potential, the collector being connected to the second potential through a load element, the base being connected to the collector of said first transistor; and a signal current source for supplying a current signal to be amplified. The output stage according to the invention is advantageous because the gain provided is exponential, yet the bias condition remains stable. The output stage also operates efficiently from a power perspective as power consumption is low during quiescent conditions.
Abstract translation: 公开了用于放大器的高增益共发射极输出级。 在一个实施例中，根据本发明的用于放大器电路的输出级包括：具有基极，发射极和集电极的第一晶体管，所述发射极通过第一电阻器连接到第一电位，所述集电极连接到第二晶体管 所述基极通过第二电阻器和偏置电流源的串联连接，所述基极连接在所述第二电阻器和所述偏置电流之间; 具有基极，发射极和集电极的第二晶体管，所述发射极连接到所述第一电位，所述集电极通过负载元件连接到所述第二电位，所述基极连接到所述第一晶体管的集电极; 以及用于提供要放大的电流信号的信号电流源。 根据本发明的输出级是有利的，因为所提供的增益是指数的，但偏置条件保持稳定。 在静态条件下，功耗低时，输出级也可以从功率角度高效运行。
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公开(公告)号：US4284872A
公开(公告)日：1981-08-18
申请号：US144179
申请日：1980-04-25
Applicant: Jerald G. Graeme
Inventor： Jerald G. Graeme
CPC classification number: H01L27/0211 , B23K26/351
Abstract: Apparatus and method for compensating thermal drift of temperature sensitive circuitry in an integrated circuit by heating the temperature sensitive circuitry by applying power to a heating element in the integrated circuit, testing the temperature sensitive circuitry, and trimming a thin film resistor in accordance with the testing results. The heating element is an integrated resistor adjacent to or surrounding the temperature sensitive circuitry. The integrated circuit further includes a thin film compensation resistor which affects or determines the degree of temperature sensitivity of the temperature sensitive circuitry. As the temperature of the temperature sensitive circuitry is increased, testing apparatus is utilized to measure a temperature sensitive parameter of the temperature sensitive circuitry. Control signals indicative of the amount of required trimming of the thin film compensation resistor are produced in response to the testing to adequately compensate the thermal drift of the temperature sensitive circuitry. The control signals are utilized to control the operations of a laser which precisely trims the thin film compensating resistor by the required amount.
Abstract translation: 通过对集成电路中的加热元件施加功率加热温度敏感电路，测试温度敏感电路和根据测试修整薄膜电阻器来补偿集成电路中的温度敏感电路的热漂移的装置和方法 结果。 加热元件是与温度敏感电路相邻或围绕的集成电阻。 集成电路还包括影响或确定温度敏感电路的温度敏感度的薄膜补偿电阻器。 随着温度敏感电路的温度升高，测试装置用于测量温度敏感电路的温度敏感参数。 响应于测试来产生指示薄膜补偿电阻器所需的修整量的控制信号，以充分补偿温度敏感电路的热漂移。 控制信号用于控制将薄膜补偿电阻精确修整所需量的激光器的操作。
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公开(公告)号：US5019789A
公开(公告)日：1991-05-28
申请号：US544231
申请日：1990-06-26
Applicant: Jerald G. Graeme , Steven D. Millaway
Inventor： Jerald G. Graeme , Steven D. Millaway
CPC classification number: H03F1/3217
Abstract: A push-pull amplifier circuit includes an NPN pullup transistor and an pulldown transistor, an emitter of the pullup transistor being coupled to a collector of the pulldown transistor. A first resistor is coupled between an output conductor and the emitter of the pullup transistor, and a second resistor is coupled between an emitter of the pulldown transistor and a supply voltage. A bias circuit includes a phase splitting transistor having an emitter coupled to a constant bias current source and a base of the pullup transistor, a collector coupled to a base of the pulldown transistor, and a control electrode coupled to an input signal. The phase splitting transistor steers a portion of the bias current into a first conductor connected to the base of the pullup transistor and a portion of the bias current into a second conductor connected to the base of the pulldown transistor in response to an input signal applied to the control electrode of the phase splitting transistor. A change in an output current flowing through the output conductor changes a base-emitter voltage of the pullup transistor by flowing through the first resistor and changing the voltage across the first resistor to compensate for steering current from the constant bias current source out of the first conductor to maintain a minimum amount of bias current flowing in the pullup transistor when the pulldown transistor is turned on hard, thereby reducing crossover distortion, maintaining output impedance low, and increasing bandwidth of the circuit.
Abstract translation: 推挽放大器电路包括NPN上拉晶体管和下拉晶体管，所述上拉晶体管的发射极耦合到所述下拉式晶体管的集电极。 第一电阻器耦合在输出导体和上拉晶体管的发射极之间，第二电阻耦合在下拉晶体管的发射极和电源电压之间。 偏置电路包括相分离晶体管，其具有耦合到恒定偏置电流源的发射极和上拉晶体管的基极，耦合到下拉晶体管的基极的集电极和耦合到输入信号的控制电极。 相位分离晶体管将偏置电流的一部分转向连接到上拉晶体管的基极的第一导体，并且偏置电流的一部分响应于施加到下拉晶体管的输入信号而连接到下拉晶体管的基极的第二导体 分相晶体管的控制电极。 流过输出导体的输出电流的变化通过流过第一电阻器来改变上拉晶体管的基极 - 发射极电压，并且改变跨越第一电阻器的电压，以补偿来自恒定偏置电流源的转向电流 导体，以在下拉晶体管导通时保持在上拉晶体管中流动的最小量的偏置电流，从而减小交叉失真，保持输出阻抗低，并增加电路带宽。
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公开(公告)号：US4596958A
公开(公告)日：1986-06-24
申请号：US654959
申请日：1984-09-26
Applicant: Jerald G. Graeme , Steven D. Millaway
Inventor： Jerald G. Graeme , Steven D. Millaway
IPC: H03F3/45
CPC classification number: H03F3/45278 , H03F3/45367 , H03F2203/45094 , H03F2203/45096 , H03F2203/45188 , H03F2203/45224 , H03F2203/45274 , H03F2203/45648
Abstract: A differential common base amplifier circuit includes first and second source follower field effect transistors that apply a differential input signal between the emitters of first and second bipolar transistors having a common base connection. An output circuit connected to the collector of the first bipolar transistor includes a bipolar emitter follower transistor having its emitter connected to a first field effect transistor which is connected to the emitter of the emitter follower transistor. The gate of the first field effect transistor is connected to the gate of one of the source follower field effect transistors. Process-caused variations in the gate to source voltage characteristic of the second source follower field effect transistor and the first field effect transistor are applied equally to the emitter and collector of the second bipolar transistor. This avoids input offset errors due to base width variations in the second bipolar transistor. Feed-forward signals coupled to the emitter of the emitter follower transistor in response to the input signal prevent roll off of the frequency response of the differential common base amplifier, due to the high frequency response of the emitter follower transistor when operated in what is, in effect, a common base configuration.
Abstract translation: 差分公共基本放大器电路包括第一和第二源极跟随器场效应晶体管，其在具有公共基极连接的第一和第二双极晶体管的发射极之间施加差分输入信号。 连接到第一双极晶体管的集电极的输出电路包括双极射极跟随器晶体管，其双极射极跟随器晶体管的发射极连接到与射极跟随器晶体管的发射极连接的第一场效应晶体管。 第一场效应晶体管的栅极连接到源极跟随器场效应晶体管之一的栅极。 第二源极跟随器场效应晶体管和第一场效应晶体管的栅极到源极电压特性的工艺引起的变化被均等地施加到第二双极晶体管的发射极和集电极。 这避免了由于第二双极晶体管的基极宽度变化导致的输入偏移误差。 响应于输入信号耦合到射极跟随器晶体管的发射极的前馈信号由于射极跟随器晶体管的操作时的高频率响应而阻止差分公共基极放大器的频率响应的下降， 实际上，共同的基本配置。
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Patent Agency Ranking
公开(公告)号：US4550291A
公开(公告)日：1985-10-29
申请号：US538377
申请日：1983-10-03
Applicant: Steven D. Millaway , Jerald G. Graeme
Inventor： Steven D. Millaway , Jerald G. Graeme
CPC classification number: H03F1/226
Abstract: In a circuit in which a common-source junction field effect transistor (JFET) is cascoded with a JFET element, current diversion or division circuits are used to divert a majority of the current passing through the input amplifier stage so that it bypasses the cascode FET without compromising the primary circuit function. The bypassing function is achieved by a current mirror, a current mirror-like circuit, or similar devices such as current sources, current splitters and the like and the circuits may be ratioed to more precisely control the bypass current by the use of emitter area scaling, ratioed emitter degeneration resistors, or both. The resultant cascode circuit is relatively noise-free and can easily be implemented into a monolithic integrated circuit without using excess or unrealistic die areas. Another advantage is that the current dividers or diverters make it easier to bias the cascode FET and a further advantage is that the same techniques can be applied with other than JFET amplifier elements, and with other amplifier devices, differential stages, plural stages, and the like.
Abstract translation: 在共源极结场效应晶体管（JFET）与JFET元件级联的电路中，使用电流分流或除法电路来转移通过输入放大器级的电流的大部分，使得它绕过共源共栅FET 而不损害初级电路功能。 旁路功能通过电流镜，电流镜像电路或类似的器件（例如电流源，电流分流器等）来实现，并且电路可以通过使用发射器面积缩放来比较更精确地控制旁路电流 ，比率的发射极退化电阻器，或两者。 所得到的共源共栅电路相对无噪声，并且可以容易地实现为单片集成电路，而不使用过量或不切实际的裸片区域。 另一个优点是，电流分配器或分流器使得更容易偏置共源共栅FET，另一个优点是可以使用与JFET放大器元件以外的相同的技术，以及与其它放大器器件，差分级，多级和 喜欢。
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公开(公告)号：US5907262A
公开(公告)日：1999-05-25
申请号：US751605
申请日：1996-11-18
Applicant: Jerald G. Graeme , Madhav V. Kolluri
Inventor： Jerald G. Graeme , Madhav V. Kolluri
CPC classification number: H03F3/3066
Abstract: An amplifier circuit that offers high bandwidth operation and a high slew rate is disclosed. The amplifier circuit may also have an input voltage swing down to the negative rail which is particularly suitable for low voltage applications having a single power source. In one embodiment, the amplifier circuit amplifies a difference voltage between first and second input voltages to produce an output voltage, and includes: an analog voltage-to-current converter for receiving the first and second input voltages and producing complementary current signals; and a complementary mirror output stage coupled to receive the complementary current signals at respective mirror circuits. Each of the respective mirror circuits includes a pair of base-coupled transistors having their emitters respectively connected to supply potentials through resistors, and the complementary current signals from the analog voltage-to-current converter are respectively connected to at least one of the emitter of the base-coupled transistors for the respective mirror circuits.
Abstract translation: 公开了一种提供高带宽操作和高压摆率的放大器电路。 放大器电路还可以具有向下移动到负导轨的输入电压，其特别适用于具有单个电源的低电压应用。 在一个实施例中，放大器电路放大第一和第二输入电压之间的差分电压以产生输出电压，并且包括：模拟电压 - 电流转换器，用于接收第一和第二输入电压并产生互补电流信号; 以及耦合以在各个反射镜电路处接收互补电流信号的互补反射镜输出级。 各个反射镜电路中的每一个包括一对基极耦合晶体管，它们的发射极分别通过电阻连接到电源电位，并且来自模拟电压 - 电流转换器的互补电流信号分别连接到 用于各个反射镜电路的基极耦合晶体管。
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7.发明授权
公开(公告)号：US4356379A
公开(公告)日：1982-10-26
申请号：US153764
申请日：1980-05-27
Applicant: Jerald G. Graeme
Inventor： Jerald G. Graeme
CPC classification number: H01L27/0211 , B23K26/351
Abstract: Apparatus for compensating thermal drift of temperature sensitive circuitry in an integrated circuit by heating the temperature sensitive circuitry by applying power to a heating element in the integrated circuit, testing the temperature sensitive circuitry, and trimming a thin film resistor in accordance with the testing results. The heating element is an integrated resistor adjacent to or surrounding the temperature sensitive circuitry. The integrated circuit further includes a thin film compensating resistor which affects or determines the degree of temperature sensitivity of the temperature sensitive circuitry. As the temperature of the temperature sensitive circuitry is increased, testing apparatus is utilized to measure a temperature sensitive parameter of the temperature sensitive circuitry. Control signals indicative of the amount of required trimming of the thin film compensation resistor are produced in response to the testing to adequately compensate the thermal drift of the temperature sensitive circuitry. The control signals are utilized to control the operations of a laser which precisely trims the thin film compensating resistor by the required amount.
Abstract translation: 用于通过对集成电路中的加热元件施加功率加热温度敏感电路，测试温度敏感电路和根据测试结果修整薄膜电阻来补偿集成电路中的温度敏感电路的热漂移的装置。 加热元件是与温度敏感电路相邻或围绕的集成电阻。 集成电路还包括影响或确定温度敏感电路的温度敏感度的薄膜补偿电阻器。 随着温度敏感电路的温度升高，测试装置用于测量温度敏感电路的温度敏感参数。 响应于测试来产生指示薄膜补偿电阻器所需修整量的控制信号，以充分补偿温度敏感电路的热漂移。 控制信号用于控制将薄膜补偿电阻精确修整所需量的激光器的操作。
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公开(公告)号：US4229692A
公开(公告)日：1980-10-21
申请号：US954341
申请日：1978-10-25
Applicant: Jerald G. Graeme
Inventor： Jerald G. Graeme
Abstract: A transducer bridge amplifier system includes a first operational amplifier having positive and negative inputs connected, respectively, to first and second output nodes of the bridge. The output of the operational amplifier is connected to a third node of the transducer bridge. A transducer of the transducer bridge is connected between the second node and the third node. A second operational amplifier has its positive input connected to ground and its negative input connected to the first node. A feedback resistor is coupled between the output of the second amplifier and a negative input of the second amplifier. An output signal produced by the second operational amplifier has a linear response to transducer deviation and low sensitivity to offset voltages of the first and second operational amplifiers. In a second alternate embodiment of the invention, the second operational amplifier has its output and its negative input connected to a negative terminal of a voltage supply biasing the transducer bridge amplifier system. The second operational amplifier has its positive input connected to the first node. The current flowing into the bridge system via the first node has linear response to transducer deviation and low sensitivity to affect voltages of the first and second operational amplifiers substantially independently of any impedance connected to the first node. In a third embodiment of the invention, the second operational amplifier can be omitted. A constant current source, rather than a constant voltage source, is used to bias the transducer bridge amplifier system. The current flowing into the first node biases linear response to transducer deviation and low sensitivity to offset voltage of the first operational amplifier.
Abstract translation: 换能器桥式放大器系统包括具有分别连接到桥的第一和第二输出节点的正和负输入的第一运算放大器。 运算放大器的输出连接到换能器桥的第三个节点。 传感器桥的换能器连接在第二节点和第三节点之间。 第二个运算放大器的正输入连接到地，其负输入连接到第一个节点。 反馈电阻耦合在第二放大器的输出端和第二放大器的负输入端之间。 由第二运算放大器产生的输出信号对第一和第二运算放大器的换能器偏差和偏移电压的低灵敏度具有线性响应。 在本发明的第二替代实施例中，第二运算放大器具有其输出，其负输入连接到偏置换能器桥式放大器系统的电压源的负极端子。 第二个运算放大器的正输入端与第一个节点相连。 经由第一节点流入桥接系统的电流对于传感器偏差具有线性响应，并且低灵敏度以基本上独立于连接到第一节点的任何阻抗来影响第一和第二运算放大器的电压。 在本发明的第三实施例中，可省略第二运算放大器。 使用恒流源而不是恒压源来偏置换能器桥式放大器系统。 流入第一个节点的电流偏置了对传感器偏差的线性响应和对第一运算放大器偏移电压的低灵敏度。
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9.发明授权Feedback control reducing signal distortion produced by differential amplifier stage 失效反馈控制减少由差分放大器级产生的信号失真
公开(公告)号：US5053718A
公开(公告)日：1991-10-01
申请号：US547997
申请日：1990-07-03
Applicant: Jerald G. Graeme , Steven D. Millaway
Inventor： Jerald G. Graeme , Steven D. Millaway
CPC classification number: H03F1/3211 , H03F3/45071
Abstract: A low distortion differential amplifier circuit includes a primary differential circuit stage and a secondary differential circuit stage. The primary differential circuit stage includes first and second transistors each having a first current source coupled to the emitters of the first and second transistors. A first load device is coupled to the collector of the second transistor. The secondary differential circuit stage includes third and fourth transistors. A second current source is coupled to the emitters of the third and fourth transistors. The bases of the third and fourth transistors are coupled to the collectors of the first and second transistors, respectively. A second load device is coupled to the collector of the fourth transistor. A fifth transistor has its emitter and collector coupled to a supply voltage conductor and the base of the third transistor, respectively. The base of the fifth transistor is coupled to the collector of the fourth transistor, whereby the secondary differential circuit stage maintains the second current-carrying electrodes of the first and second transistors at equal voltages to reduce distortion due to differences in voltages between the control electrode and second current-carrying electrode of the first and second transistors.
Abstract translation: 低失真差分放大器电路包括初级差分电路级和次级差分电路级。 主差分电路级包括第一和第二晶体管，每个具有耦合到第一和第二晶体管的发射极的第一电流源。 第一负载装置耦合到第二晶体管的集电极。 次级差分电路级包括第三和第四晶体管。 第二电流源耦合到第三和第四晶体管的发射极。 第三和第四晶体管的基极分别耦合到第一和第二晶体管的集电极。 第二负载装置耦合到第四晶体管的集电极。 第五晶体管的发射极和集电极分别耦合到电源电压导体和第三晶体管的基极。 第五晶体管的基极耦合到第四晶体管的集电极，由此次级差分电路级将第一和第二晶体管的第二载流电极保持在相等的电压，以减少由于控制电极 和第一和第二晶体管的第二载流电极。
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