Abstract:
A pair of common base connected transistors have their emitters coupled to provide the input terminals of a differential amplifier. The collectors are coupled to a current mirror that provides a small current bias that operates the transistors at equal current densities. The common bases are coupled to a node that is driven to a level that causes the bases to track the emitters with a one V.sub.BE offset that will therefore automatically adjust to conform to the applied current. When a remotely grounded transducer is coupled to the amplifier input it can operate at a common mode potential outside of the span of the power supply that operates the amplifier.
Abstract:
A telescopic differential operational amplifier circuit for use in a pipelined A/D converter is provided with two auxiliary differential amplifiers connected to two cascode circuits, each including cascode-connected first to fourth transistors. During the sampling phase, first and second switches are turned on to apply a predetermined bias voltage to the gates of first and fourth transistors, and the input terminal of the differential operational amplifier circuit is set to a common mode voltage. During the hold phase, the first and second switches are turned off so that a voltage of each of the gates of the first and fourth transistors change to follow an input signal inputted via the input terminal with coupling capacitors operating as a level shifter of the input signal. Then the differential operational amplifier circuit performs push-pull operation operative only in a transconductance drive region, and is prevented from operating in a slewing region.
Abstract:
A telescopic differential operational amplifier circuit for use in a pipelined A/D converter is provided with two auxiliary differential amplifiers connected to two cascode circuits, each including cascode-connected first to fourth transistors. During the sampling phase, first and second switches are turned on to apply a predetermined bias voltage to the gates of first and fourth transistors, and the input terminal of the differential operational amplifier circuit is set to a common mode voltage. During the hold phase, the first and second switches are turned off so that a voltage of each of the gates of the first and fourth transistors change to follow an input signal inputted via the input terminal with coupling capacitors operating as a level shifter of the input signal. Then the differential operational amplifier circuit performs push-pull operation operative only in a transconductance drive region, and is prevented from operating in a slewing region.
Abstract:
A differential amplifier stage includes one active load circuit connected to a pair of cross-coupled transistors that produce a differential signal. The active load circuit controls the rise time of the differential signal. The differential amplifier stage also includes another active load circuit connected to the pair of cross-coupled transistors. The second active load circuit controls the fall time of the differential signal.
Abstract:
A differential amplifier stage includes one active load circuit connected to a pair of cross-coupled transistors that produce a differential signal. The active load circuit controls the rise time of the differential signal. The differential amplifier stage also includes another active load circuit connected to the pair of cross-coupled transistors. The second active load circuit controls the fall time of the differential signal.
Abstract:
Provided is a receiver including an oscillator (OSC) configured to generate an oscillation signal based on a radio signal, a clocked envelope detector (ED) configured to detect an envelope of the oscillation signal and hold a peak value of the envelope during a time interval, and an analog-to-digital converter (ADC) configured to convert the peak value of the envelope into a digital signal.
Abstract:
A transconductance amplifier suitable for the input stage of a comparator with the capability of amplifying input signals with common mode voltage components in a range including the entirety of its operating voltage. Operation at one voltage extreme is accomplished by use of a long tailed pair connection of a pair of bulk modulated FETs with gates at the input terminals of the amplifier. Operation at the other voltage extreme is accomplished by the use of a pair of FETs in a source follower mode to drive common gate transistors of opposite polarity, the gates of the FETs also being connected to the input terminals of the amplifier. A common high impedance load for the comparator is connected to current mirrors of the drains of both pairs of FETs in the amplifier. The circuit may be implemented with bipolar transistors and additional amplification provided. Methods of comparing voltages are also disclosed.
Abstract:
A transconductance amplifier suitable for the input stage of a comparator with the capability of amplifying input signal with common mode voltage components in a range including the entirety of its operating voltage. Operation at one voltage extreme is accomplished by use of a long tailed pair connection of a pair of bulk modulated FETs with gates at the input terminals of the amplifier. Operation at the other voltage extreme is accomplished by the use of a pair of FETs in a source follower mode to drive common gate transistors of opposite polarity, the gates of the FETs also being connected to the input terminals of the amplifier. A common high impedance load for the comparator is connected to current mirrors of the drains of both pairs of FETs in the amplifier. The circuit may be implemented with bipolar transistors and additional amplification provided. Methods of comparing voltages are also disclosed.
Abstract:
Low quiescent power, high output power, rail-to-rail output stage circuits and methods are provided. The output stages are capable of providing output voltages that are substantially equal to the supply voltages (i.e., within one V.sub.CE SAT of both supply voltages) without a substantial increase in output circuit complexity and without a substantial increase in quiescent current. The output stages operate by providing a direct path for the drive signal to the output sinking transistor, and an additional, separate path for the drive signal to the output sourcing transistor. The sinking and sourcing paths are separated by a PNP transistor that gradually turns off during sinking to isolate that portion of the circuit so that the drive current to the sinking transistor is not reduced. Additional embodiments are provided where additional components are utilized to further increase the maximum sink and source currents without a significant increase in quiescent current or reduction in output swing.
Abstract:
A differential common base amplifier circuit includes first and second source follower field effect transistors that apply a differential input signal between the emitters of first and second bipolar transistors having a common base connection. An output circuit connected to the collector of the first bipolar transistor includes a bipolar emitter follower transistor having its emitter connected to a first field effect transistor which is connected to the emitter of the emitter follower transistor. The gate of the first field effect transistor is connected to the gate of one of the source follower field effect transistors. Process-caused variations in the gate to source voltage characteristic of the second source follower field effect transistor and the first field effect transistor are applied equally to the emitter and collector of the second bipolar transistor. This avoids input offset errors due to base width variations in the second bipolar transistor. Feed-forward signals coupled to the emitter of the emitter follower transistor in response to the input signal prevent roll off of the frequency response of the differential common base amplifier, due to the high frequency response of the emitter follower transistor when operated in what is, in effect, a common base configuration.