公开(公告)号：US08729591B2

公开(公告)日：2014-05-20

申请号：US12426796

申请日：2009-04-20

申请人： Jochen Kuhmann ,  Lior Shiv

发明人： Jochen Kuhmann ,  Lior Shiv

IPC分类号： H01L33/00

CPC分类号： H01L33/486 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49827 ,  H01L33/60 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

摘要： Non-planar via designs for sub-mounts on which to mount a LED or other optoelectronic device include a continuous layer of metal to conduct the current from the front-side (e.g., LED side) to the backside (e.g., SMD side) through the via and to provide a sufficiently stable and reliable under bump metallization for SMD soldering. Each UBM can be structured so that it does not fully cover the sidewall surfaces of the via that forms the front-to-backside interconnect. In some implementations, each via structure for the feedthrough metallization extends to a respective side-edge of the sub-mount.

摘要翻译： 用于安装LED或其他光电子器件的子安装座的非平面通孔设计包括连续的金属层，以将电流从前侧（例如，LED侧）传导到背面（例如，SMD侧） 通孔，并为SMD焊接提供足够稳定和可靠的凸块下金属化。 每个UBM可以被构造成使得其不完全覆盖形成前后互连的通孔的侧壁表面。 在一些实施方案中，用于馈通金属化的每个通孔结构延伸到子安装座的相应侧边缘。

公开(公告)号：US08309973B2

公开(公告)日：2012-11-13

申请号：US12369993

申请日：2009-02-12

申请人： Jochen Kuhmann ,  Heike Huscher

发明人： Jochen Kuhmann ,  Heike Huscher

IPC分类号： H01L27/15

CPC分类号： H01L23/13 ,  H01L23/147 ,  H01L23/49827 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01L2924/00012 ,  H01L2924/00

摘要： A package for an optoelectronic device (e.g., a light emitting device such as a LED) includes a sub-mount including a silicon substrate having a thickness in the range of 350 μm-700 μm. The optoelectronic device is mounted on a die attach pad on the front-side surface of the substrate. Feed-through metallization in one or more via structures electrically couples the die attach pad to a contact pad on the back-side surface of the substrate.

摘要翻译： 用于光电器件（例如，诸如LED的发光器件）的封装包括具有厚度在350μm-700μm范围内的硅衬底的子座。 光电子器件安装在衬底的正面上的管芯附着焊盘上。 一个或多个通孔结构中的直通金属化将管芯附着垫电耦合到衬底的背面表面上的接触焊盘。

公开(公告)号：US20090181500A1

公开(公告)日：2009-07-16

申请号：US12014443

申请日：2008-01-15

申请人： Jochen Kuhmann ,  Andreas A. Hase

发明人： Jochen Kuhmann ,  Andreas A. Hase

IPC分类号： H01L21/58

CPC分类号： H01L23/04 ,  B81B2207/096 ,  B81C1/00301 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/00

摘要： A wafer-level method of fabricating a chip-to-wafer or wafer-to-wafer semiconductor packages includes etching a cavity into a first semiconductor wafer and etching vias in a bottom of the cavity. The cavity and sidewalls of the vias are selectively metallized. The cavity can be used to house either an electrical circuit component or to contain a device die. A second semiconductor wafer is placed over the cavity-side of the first semiconductor and is sealed to the first semiconductor wafer. A backside of the first semiconductor wafer is thinned to expose metallization in the vias and metal is deposited on the backside to form circuit routing paths.

摘要翻译： 制造晶片到晶片或晶片到晶片半导体封装的晶片级方法包括将腔蚀刻到第一半导体晶片中并蚀刻空腔的底部中的通孔。 通孔的腔和侧壁被选择性地金属化。 空腔可用于容纳电路元件或容纳器件裸片。 将第二半导体晶片放置在第一半导体的空腔侧上并且密封到第一半导体晶片。 第一半导体晶片的背面变薄以暴露通孔中的金属化，金属沉积在背面以形成电路布线路径。

公开(公告)号：US20070035001A1

公开(公告)日：2007-02-15

申请号：US11202478

申请日：2005-08-11

申请人： Jochen Kuhmann ,  Matthias Heschel

发明人： Jochen Kuhmann ,  Matthias Heschel

IPC分类号： H01L23/02

CPC分类号： B81C1/0023 ,  H01L2224/32245 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： A package includes a sensor die with a micro component, such as a MEMS device, coupled to an integrated circuit which may include, for example, CMOS circuitry, and one or more electrically conductive bond pads near the periphery of the sensor die. A semiconductor cap structure is attached to the sensor die. The front side of the cap structure is attached to the sensor die by a seal ring to hermetically encapsulate an area of the sensor die where the micro component is located. The bond pads on the sensor die are located outside the area encapsulated by the seal ring. Electrical leads, which extend along outer side edges of the semiconductor cap structure from its front side to its back side, are coupled to the micro component via the bond pads.

摘要翻译： 封装包括具有耦合到集成电路的微器件（例如MEMS器件）的传感器管芯，该集成电路可以包括例如CMOS电路，以及在传感器管芯的周围附近的一个或多个导电接合焊盘。 半导体盖结构附接到传感器管芯。 盖结构的前侧通过密封环附接到传感器管芯，以密封地封装微组件所在的传感器管芯的区域。 传感器芯片上的接合焊盘位于由密封环封装的区域之外。 沿着半导体盖结构的外侧边缘从其前侧延伸到其后侧的电引线通过接合焊盘耦合到微型部件。

公开(公告)号：US20110045618A1

公开(公告)日：2011-02-24

申请号：US12938512

申请日：2010-11-03

申请人： Jochen Kuhmann

发明人： Jochen Kuhmann

IPC分类号： H01L33/58

CPC分类号： H01L33/62 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L33/486 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2933/0016 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer having first and second surfaces on opposite sides of the wafer. The method includes etching vias in the first surface of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad and to define the anode and cathode contact pads. A carrier wafer is attached on the side of the semiconductor wafer having the first surface, and the semiconductor wafer is thinned from its second surface to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad and additional anode and cathode pads for the opto-electronic component. The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.

摘要翻译： 一种制造光电子部件封装的晶片级方法，其中光电子部件安装到具有晶片相对侧上的第一和第二表面的半导体晶片。 该方法包括在半导体晶片的第一表面中蚀刻通孔。 通孔中的第一表面和表面被金属化，并且金属被构造成限定热垫并且限定阳极和阴极接触垫。 载体晶片安装在具有第一表面的半导体晶片的侧面上，并且半导体晶片从其第二表面变薄以暴露通孔中的金属化。 金属被提供在第二表面上，并且金属被构造成限定管芯附接焊盘和附加的用于光电子部件的阳极和阴极焊盘。 光电元件安装在芯片安装板上，并在光电元件上形成保护盖。

公开(公告)号：US07851818B2

公开(公告)日：2010-12-14

申请号：US12236182

申请日：2008-09-23

申请人： Jochen Kuhmann

发明人： Jochen Kuhmann

IPC分类号： H01L33/00 ,  H01L27/15 ,  H01L31/12 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L33/62 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L33/486 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2933/0016 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer having first and second surfaces on opposite sides of the wafer. The method includes etching vias in the first surface of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad and to define the anode and cathode contact pads. A carrier wafer is attached on the side of the semiconductor wafer having the first surface, and the semiconductor wafer is thinned from its second surface to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad and additional anode and cathode pads for the opto-electronic component. The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.

摘要翻译： 一种制造光电子部件封装的晶片级方法，其中光电子部件安装到具有晶片相对侧上的第一和第二表面的半导体晶片。 该方法包括在半导体晶片的第一表面中蚀刻通孔。 通孔中的第一表面和表面被金属化，并且金属被构造成限定热垫并且限定阳极和阴极接触垫。 载体晶片安装在具有第一表面的半导体晶片的侧面上，并且半导体晶片从其第二表面变薄以暴露通孔中的金属化。 金属被提供在第二表面上，并且金属被构造成限定管芯附接焊盘和附加的用于光电子部件的阳极和阴极焊盘。 光电元件安装在芯片安装板上，并在光电元件上形成保护盖。

公开(公告)号：US20100200888A1

公开(公告)日：2010-08-12

申请号：US12369993

申请日：2009-02-12

申请人： Jochen Kuhmann ,  Heike Huscher

发明人： Jochen Kuhmann ,  Heike Huscher

IPC分类号： H01L33/00 ,  H01R12/06

CPC分类号： H01L23/13 ,  H01L23/147 ,  H01L23/49827 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01L2924/00012 ,  H01L2924/00

摘要： A package for an optoelectronic device (e.g., a light emitting device such as a LED) includes a sub-mount including a silicon substrate having a thickness in the range of 350 μm-700 μm. The optoelectronic device is mounted on a die attach pad on the front-side surface of the substrate. Feed-through metallization in one or more via structures electrically couples the die attach pad to a contact pad on the back-side surface of the substrate.

摘要翻译： 用于光电器件（例如，诸如LED的发光器件）的封装包括具有厚度在350μm-700μm范围内的硅衬底的子座。 光电子器件安装在衬底的正面上的管芯附着焊盘上。 一个或多个通孔结构中的直通金属化将管芯附着垫电耦合到衬底的背面表面上的接触焊盘。

公开(公告)号：US20090321760A1

公开(公告)日：2009-12-31

申请号：US12236182

申请日：2008-09-23

申请人： Jochen Kuhmann

发明人： Jochen Kuhmann

IPC分类号： H01L21/50 ,  H01L33/00

CPC分类号： H01L33/62 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L33/486 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2933/0016 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer having first and second surfaces on opposite sides of the wafer. The method includes etching vias in the first surface of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad and to define the anode and cathode contact pads. A carrier wafer is attached on the side of the semiconductor wafer having the first surface, and the semiconductor wafer is thinned from its second surface to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad and additional anode and cathode pads for the opto-electronic component. The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.

摘要翻译： 一种制造光电子部件封装的晶片级方法，其中光电子部件安装到具有晶片相对侧上的第一和第二表面的半导体晶片。 该方法包括在半导体晶片的第一表面中蚀刻通孔。 通孔中的第一表面和表面被金属化，并且金属被构造成限定热垫并且限定阳极和阴极接触垫。 载体晶片安装在具有第一表面的半导体晶片的侧面上，并且半导体晶片从其第二表面变薄以暴露通孔中的金属化。 金属被提供在第二表面上，并且金属被构造成限定管芯附接焊盘和附加的用于光电子部件的阳极和阴极焊盘。 光电元件安装在芯片安装板上，并在光电元件上形成保护盖。

公开(公告)号：US20070286437A1

公开(公告)日：2007-12-13

申请号：US11783818

申请日：2007-04-12

申请人： Matthias Mullenborn ,  Jochen Kuhmann ,  Peter Scheel

发明人： Matthias Mullenborn ,  Jochen Kuhmann ,  Peter Scheel

IPC分类号： H04R25/00

CPC分类号： H04R19/005 ,  H04R19/04 ,  H04R25/00

摘要： The present invention relates to a surface mountable acoustic transducer system, comprising one or more transducers, a processing circuit electrically connected to the one or more transducers, and contact points arranged on an exterior surface part of the transducer system. The contact points are adapted to establish electrical connections between the transducer system and an external substrate, the contact points further being adapted to facilitate mounting of the transducer system on the external substrate by conventional surface mounting techniques.

摘要翻译： 本发明涉及一种可表面安装的声换能器系统，其包括一个或多个换能器，电连接到一个或多个换能器的处理电路，以及布置在换能器系统的外表面部分上的接触点。 接触点适于在换能器系统和外部基板之间建立电气连接，接触点还适于通过常规的表面安装技术便于将换能器系统安装在外部基板上。

公开(公告)号：US20070120041A1

公开(公告)日：2007-05-31

申请号：US11558175

申请日：2006-11-09

申请人： Lior Shiv ,  Jochen Kuhmann

发明人： Lior Shiv ,  Jochen Kuhmann

IPC分类号： C12Q1/68 ,  H01L23/02

CPC分类号： H01L27/14618 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14683 ,  H01L27/14685 ,  H01L31/0203 ,  H01L31/02325 ,  H01L33/44 ,  H01L33/483 ,  H01L2924/16235

摘要： A package includes one or more optoelectronic components and a cap with an embedded glass window attached to a substrate. The optoelectronic component(s) is supported by the substrate and is capable of detecting or emitting light through the glass window. The glass window may serve as an optical filter. Techniques are disclosed for fabricating a relatively thin package with an embedded glass window in the cap.

摘要翻译： 包装包括一个或多个光电子部件和具有附接到基板的嵌入式玻璃窗的盖。 光电子部件由衬底支撑并且能够通过玻璃窗检测或发射光。 玻璃窗可以用作滤光器。 公开了用于制造具有在盖中的嵌入式玻璃窗的相对薄的包装的技术。