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19 条记录 (耗时 0.016 秒)

    On-chip regulator providing good high frequency rejection and noise filtering from the supply
    2.
    发明授权
    On-chip regulator providing good high frequency rejection and noise filtering from the supply 失效
    片上稳压器从电源提供良好的高频抑制和噪声滤波

    公开(公告)号：US5942934A

    公开(公告)日：1999-08-24

    申请号：US890417

    申请日：1997-07-09

    申请人： Tuan V. Ngo ,  John D. Leighton

    发明人： Tuan V. Ngo ,  John D. Leighton

    IPC分类号： G05F3/22 ,  G05F3/26 ,  G05F1/10

    CPC分类号： G05F3/265 ,  G05F3/222

    摘要： A power supply filter has a primary current source coupled to a node carrying a power supply signal. The second end of the primary current source is coupled to an impedance that is further coupled to a low voltage node. A differential amplifier having an inverting input, a non-inverting input, and an output, has its non-inverting input coupled to the junction between the impedance and the primary current source. The output of the differential amplifier carries the filtered power supply signal and is coupled to a capacitance. The capacitance is coupled between the output and a lower voltage. A feedback path is coupled between the output and the inverting input.

    摘要翻译： 电源滤波器具有耦合到承载电源信号的节点的初级电流源。 初级电流源的第二端耦合到进一步耦合到低电压节点的阻抗。 具有反相输入，非反相输入和输出的差分放大器具有耦合到阻抗和主电流源之间的结的非反相输入。 差分放大器的输出携带滤波后的电源信号并耦合到电容。 电容耦合在输出和较低的电压之间。 反馈路径耦合在输出和反相输入端之间。

    Power supply filter with active element assist
    3.
    发明授权
    Power supply filter with active element assist 失效
    具有有源元件辅助功能的电源滤波器

    公开(公告)号：US5721484A

    公开(公告)日：1998-02-24

    申请号：US769125

    申请日：1996-12-19

    申请人： Tuan V. Ngo ,  John D. Leighton

    发明人： Tuan V. Ngo ,  John D. Leighton

    IPC分类号： G05F3/26 ,  G05F3/16

    CPC分类号： G05F3/265

    摘要： A power supply filter is constructed with a capacitive element and an active element coupled to a filtered node and an impedance coupled between the filtered node and a power supply node. The filtered node for carrying a filtered version of a power supply signal on the power supply node. The active element having electrical characteristics such that the addition of the active element to the power supply filter reduces the amount of capacitance needed from the capacitive element to achieve a desired pole frequency for a given voltage drop across the impedance element.

    摘要翻译： 电源滤波器由电容元件和耦合到滤波节点的有源元件和耦合在滤波后的节点与电源节点之间的阻抗构成。 用于在电源节点上携带电源信号的滤波版本的滤波节点。 具有电特性的有源元件使得将有源元件添加到电源滤波器减少了从电容元件所需的电容量，以达到阻抗元件上的给定电压降达到期望的极点频率。

    Integrated bias and offset recovery amplifier
    4.
    发明授权
    Integrated bias and offset recovery amplifier 有权
    集成偏置和偏移恢复放大器

    公开(公告)号：US07339760B2

    公开(公告)日：2008-03-04

    申请号：US10955775

    申请日：2004-09-30

    申请人： Jeffrey A. Gleason ,  John D. Leighton ,  Scott M. O'Brien

    发明人： Jeffrey A. Gleason ,  John D. Leighton ,  Scott M. O'Brien

    IPC分类号： G11B5/02

    CPC分类号： G11B5/02 ,  G11B2005/0016 ,  G11B2005/0018 ,  H03F3/456 ,  H03F3/45748

    摘要： A preamplifier circuit is connected to a transducing head, and has integrated bias circuitry and offset recovery circuitry. The offset recovery circuitry is activated in response to a transition from write mode to read more to provide an output signal representative of a signal across the transducing head. The bias circuitry is driven by the output signal of the offset recovery circuitry to bias the transducing head.

    摘要翻译： 前置放大器电路连接到转换头，并具有集成偏置电路和偏移恢复电路。 偏移恢复电路响应于从写入模式的转变而被读取更多，以提供表示跨导头的信号的输出信号。 偏置电路由偏移恢复电路的输出信号驱动以偏置换能头。

    Impedance-matched write circuit
    5.
    发明授权
    Impedance-matched write circuit 有权
    阻抗匹配写电路

    公开(公告)号：US06512646B1

    公开(公告)日：2003-01-28

    申请号：US09475909

    申请日：1999-12-30

    申请人： John D. Leighton ,  Raymond E. Barnett ,  Tuan V. Ngo

    发明人： John D. Leighton ,  Raymond E. Barnett ,  Tuan V. Ngo

    IPC分类号： H03B100

    CPC分类号： G11B5/022 ,  G11B5/012 ,  G11B5/02 ,  G11B2005/0013

    摘要： A write circuit selectively provides a write current through a write head in first and second opposite directions. The write circuit is connected to the write head by an interconnect, and has a positive supply level and a negative supply level. A first voltage source provides a first control voltage, and a second voltage source provides a second control voltage. A first resistor is provided between the first voltage source and the interconnect for impedance matching to the interconnect, and a second resistor is provided between the second voltage source and the interconnect for impedance matching to the interconnect. The first and second control voltages provide a transient voltage to the interconnect and provide a subsequent steady-state voltage to the interconnect.

    摘要翻译： 写入电路在第一和第二相反方向上选择性地提供写入电流通过写入头。 写入电路通过互连连接到写入头，并且具有正的电源电平和负的电源电平。 第一电压源提供第一控制电压，第二电压源提供第二控制电压。 第一电阻器设置在第一电压源和互连件之间用于与互连件的阻抗匹配，并且第二电阻器设置在第二电压源和互连件之间用于与互连件的阻抗匹配。 第一和第二控制电压为互连提供瞬态电压并向互连提供随后的稳态电压。

    Pulse-mode writer
    6.
    发明授权
    Pulse-mode writer 有权
    脉冲模式写入

    公开(公告)号：US06493161B1

    公开(公告)日：2002-12-10

    申请号：US09476016

    申请日：1999-12-31

    申请人： Carl F. Elliott ,  John D. Leighton ,  Sally A. Doherty

    发明人： Carl F. Elliott ,  John D. Leighton ,  Sally A. Doherty

    IPC分类号： G11B509

    CPC分类号： G11B5/09

    摘要： A pulse-mode data writing protocol is disclosed which reduces the time required to implement a transition in the direction of magnetization of a recording medium, and which reduces the total power required to encode a given data sequence. After a magnetic transition is encoded on the medium by generating a write current pulse through the write head, the write current through the recording head is reduced, thereby utilizing the spatial extent of the write bubble to encode the lack of a transition on the medium. Alternate configurations are disclosed for various scenarios of write bubble size versus maximum cell size, all utilizing the principle of the invention.

    摘要翻译： 公开了一种脉冲模式数据写入协议，其减少了在记录介质的磁化方向上实现转换所需的时间，并减少了编码给定数据序列所需的总功率。 通过在写入头上产生写入电流脉冲对介质上的磁转换进行编码之后，通过记录头的写入电流减小，从而利用写入气泡的空间范围来对介质上的转换进行编码。 公开了针对写入气泡尺寸与最大单元尺寸的各种情况的替代配置，所有这些都利用了本发明的原理。

    Disk drive writer with capacitive boost
    9.
    发明授权
    Disk drive writer with capacitive boost 有权
    带驱动器的磁盘驱动器

    公开(公告)号：US06813110B2

    公开(公告)日：2004-11-02

    申请号：US10219948

    申请日：2002-08-15

    申请人： John D. Leighton ,  Scott M. O'Brien ,  Robert J. Wimmer ,  Nameeta Krenz ,  Carl F. Elliott ,  Michael J. O'Brien ,  Cameron C. Rabe

    发明人： John D. Leighton ,  Scott M. O'Brien ,  Robert J. Wimmer ,  Nameeta Krenz ,  Carl F. Elliott ,  Michael J. O'Brien ,  Cameron C. Rabe

    IPC分类号： G11B502

    CPC分类号： G11B5/022 ,  G11B5/012 ,  G11B5/02

    摘要： A write driver circuit selectively provides write current through a write head in first and second opposite directions. First and second active devices are driven with first and second pre-drive signals. Third and fourth active devices are driven with third and fourth pre-drive signals. First and second pull-up resistances are provided respectively between the first and second active devices and a fixed voltage, and third and fourth pull-up resistances are provided respectively between the third and fourth active devices and the fixed voltage. A first capacitor is connected between the first active device and an intermediate point of the third pull-up resistance, and a second capacitor is connected between the second active device and an intermediate point of the fourth pull-up resistance.

    摘要翻译： 写入驱动器电路在第一和第二相反方向上选择性地提供写入电流通过写入头。 第一和第二有源器件由第一和第二预驱动信号驱动。 第三和第四有源器件由第三和第四预驱动信号驱动。 分别在第一和第二有源器件之间提供第一和第二上拉电阻和固定电压，并且在第三和第四有源器件之间分别提供第三和第四上拉电阻和固定电压。 第一电容器连接在第一有源器件和第三上拉电阻的中间点之间，第二电容器连接在第二有源器件与第四上拉电阻的中间点之间。

    Impedance-matched, voltage-mode H-bridge write drivers
    10.
    发明授权
    Impedance-matched, voltage-mode H-bridge write drivers 有权
    阻抗匹配，电压模式H桥写入驱动器

    公开(公告)号：US06285221B1

    公开(公告)日：2001-09-04

    申请号：US09630494

    申请日：2000-08-02

    申请人： John D. Leighton ,  Eric Groen

    发明人： John D. Leighton ,  Eric Groen

    IPC分类号： H03B100

    CPC分类号： G11B5/022 ,  G11B5/02 ,  G11B5/09 ,  G11B2005/0013 ,  H03K17/663

    摘要： A write driver for an inductive load includes load terminals for connection to an inductive load, and an impedance-matched driver circuit responsive to first and second control signals to supply a drive current through the load in respective first and second directions. The inductive load includes an inductive write head and a transmission line of predetermined impedance connected to the write head for connection to the first and second load terminals. Ringing is suppressed by the impedance-matching of the driver circuit to the transmission line connecting the load to the terminals.

    摘要翻译： 用于感性负载的写入驱动器包括用于连接到感性负载的负载端子和响应于第一和第二控制信号的阻抗匹配驱动器电路，以在相应的第一和第二方向上提供驱动电流通过负载。 电感负载包括感应写头和连接到写头的预定阻抗的传输线，用于连接到第一和第二负载端子。 通过驱动电路与将负载连接到端子的传输线的阻抗匹配来抑制振铃。