公开(公告)号：US07629711B2

公开(公告)日：2009-12-08

申请号：US11690596

申请日：2007-03-23

申请人： Kai Zhong ,  John J. Parkes, Jr.

发明人： Kai Zhong ,  John J. Parkes, Jr.

IPC分类号： H02J1/00 ,  G05F1/569

CPC分类号： G05F1/56

摘要： An integrated circuit package (202) includes a voltage regulator (208) and a power-out pin (236) for coupling to a load circuit (210) via a connection (234) external to the integrated circuit package and for coupling to an output (230) of the voltage regulator via a connection (224, 228, 226 and 231) internal to the integrated circuit package. The internal connection has a series resistance that causes a voltage drop due to a load current. The voltage regulator compensates for the voltage drop in the internal connection using a current feedback circuit, in which the current fed back is proportional to the voltage drop caused by the series resistance of the internal connection.

摘要翻译： 集成电路封装（202）包括电压调节器（208）和电源输出引脚（236），用于经由集成电路封装外部的连接（234）耦合到负载电路（210），并用于耦合到输出 （230），经由集成电路封装内部的连接（224,228,226和231）。 内部连接具有由负载电流引起的电压降的串联电阻。 电压调节器使用电流反馈电路补偿内部连接中的电压降，其中反馈的电流与由内部连接的串联电阻引起的电压降成比例。

公开(公告)号：US20080165041A1

公开(公告)日：2008-07-10

申请号：US11621844

申请日：2007-01-10

申请人： John J. Parkes ,  James G. Mittel ,  James J. Riches

发明人： John J. Parkes ,  James G. Mittel ,  James J. Riches

IPC分类号： H03M1/12 ,  H03M3/02

CPC分类号： H03M3/372 ,  H03M3/424

摘要： A digital-to-analog converter adapted for use as a feedback converter in a continuous time sigma delta analog-to-digital converter. The digital-to-analog converter has a discrete time digital signal input accepting digital signal samples that are synchronized with an assertion of a first data clock signal and a discrete time clock generator that generates an output pulse in response to receiving an assertion of the first data clock. The output pulse is asserted for a fixed duration that is independent of a jitter of the first data clock. The digital-to-analog converter also includes a continuous time analog output that produces, during assertion of the output pulse, a continuous time analog output signal having a magnitude corresponding to the digital signal samples.

摘要翻译： 适用于连续时间Σ-Δ模数转换器中的反馈转换器的数 - 模转换器。 数模转换器具有离散时间数字信号输入，接受与第一数据时钟信号和离散时钟发生器的断言同步的数字信号采样，该离散时钟发生器响应于接收到第一数据信号的断言而产生输出脉冲 数据时钟。 输出脉冲被断言固定持续时间，与第一个数据时钟的抖动无关。 数模转换器还包括连续时间模拟输出，其在断言输出脉冲期间产生具有对应于数字信号采样的幅度的连续时间模拟输出信号。

公开(公告)号：US06297676B1

公开(公告)日：2001-10-02

申请号：US09692985

申请日：2000-10-23

申请人： John W. Simmons ,  John J. Parkes ,  Manbir Nag

发明人： John W. Simmons ,  John J. Parkes ,  Manbir Nag

IPC分类号： H03B100

CPC分类号： H03K17/167

摘要： A ring inhibiting charging and discharging circuit (100) for use with an amplification circuit (102) that drives a load (108) is responsive to an input (104) and is capable of generating an output (106) corresponding to the input (104). The ring inhibiting charging and discharging circuit (100) includes a charge element (120) that is responsive to the output (112) from the amplification circuit (102). The charge element (120) is capable of charging the load when the input voltage is greater than a preselected multiple of the output voltage. A discharge circuit (130) is responsive to the output (106) from the amplification circuit (102) and includes a feedback circuit (132) and a staging circuit (134). The feedback circuit (132) asserts a difference signal when the output voltage is less than the preselected multiple of the input voltage. The staging circuit (134) is responsive to difference signal and gradually reduces the rate at which the load (108) is discharged over a preselected period of time once the difference signal indicates that the output voltage is within a preselected range of the input voltage.

摘要翻译： 用于与驱动负载（108）的放大电路（102）一起使用的环形抑制充电和放电电路（100）响应于输入（104）并且能够产生对应于输入（104）的输出（106） ）。 禁止充电和放电电路（100）包括响应于来自放大电路（102）的输出（112）的电荷元件（120）。 当输入电压大于输出电压的预选倍数时，充电元件（120）能够对负载充电。 放电电路（130）响应来自放大电路（102）的输出（106）并且包括反馈电路（132）和分级电路（134）。 当输出电压小于输入电压的预选倍数时，反馈电路（132）断言差分信号。 一旦差分信号表示输出电压在输入电压的预选范围内，分级电路（134）响应差分信号并逐渐降低负载（108）在预选时间段内放电的速率。

公开(公告)号：US07723962B2

公开(公告)日：2010-05-25

申请号：US11690569

申请日：2007-03-23

申请人： John J. Parkes, Jr. ,  Kai Zhong

发明人： John J. Parkes, Jr. ,  Kai Zhong

IPC分类号： H02P11/00 ,  H02P9/00

CPC分类号： G05F1/571

摘要： A circuit includes a voltage regulator (208) for outputting a voltage at a regulated level, a protection circuit (260), and a load circuit (210) coupled to the voltage regulator. The protection circuit includes means for preventing the voltage regulator from outputting a voltage at a level higher than the regulated level during a start-up period of the voltage regulator.

摘要翻译： 电路包括用于输出调节电平的电压调节器（208），保护电路（260）和耦合到电压调节器的负载电路（210）。 保护电路包括用于在电压调节器的启动期间防止电压调节器输出高于调节电平的电平的装置。

公开(公告)号：US20080231243A1

公开(公告)日：2008-09-25

申请号：US11690596

申请日：2007-03-23

申请人： Kai Zhong ,  John J. Parkes

发明人： Kai Zhong ,  John J. Parkes

IPC分类号： G05F1/10

CPC分类号： G05F1/56

摘要： An integrated circuit package (202) includes a voltage regulator (208) and a power-out pin (236) for coupling to a load circuit (210) via a connection (234) external to the integrated circuit package and for coupling to an output (230) of the voltage regulator via a connection (224, 228, 226 and 231) internal to the integrated circuit package. The internal connection has a series resistance that causes a voltage drop due to a load current. The voltage regulator compensates for the voltage drop in the internal connection using a current feedback circuit, in which the current fed back is proportional to the voltage drop caused by the series resistance of the internal connection.

摘要翻译： 集成电路封装（202）包括电压调节器（208）和电源输出引脚（236），用于经由集成电路封装外部的连接（234）耦合到负载电路（210），并用于耦合到输出 （230），经由集成电路封装内部的连接（224,228,226和231）。 内部连接具有由负载电流引起的电压降的串联电阻。 电压调节器使用电流反馈电路补偿内部连接中的电压降，其中反馈的电流与由内部连接的串联电阻引起的电压降成比例。

公开(公告)号：US20080231240A1

公开(公告)日：2008-09-25

申请号：US11690569

申请日：2007-03-23

申请人： John J. PARKES, Jr. ,  Kai Zhong

发明人： John J. PARKES, Jr. ,  Kai Zhong

IPC分类号： H02H7/06 ,  H02P9/00 ,  H02P11/00

CPC分类号： G05F1/571

摘要： A circuit includes a voltage regulator (208) for outputting a voltage at a regulated level, a protection circuit (260), and a load circuit (210) coupled to the voltage regulator. The protection circuit includes means for preventing the voltage regulator from outputting a voltage at a level higher than the regulated level during a start-up period of the voltage regulator.

摘要翻译： 电路包括用于输出调节电平的电压调节器（208），保护电路（260）和耦合到电压调节器的负载电路（210）。 保护电路包括用于在电压调节器的启动期间防止电压调节器输出高于调节电平的电平的装置。

公开(公告)号：US5507040A

公开(公告)日：1996-04-09

申请号：US358058

申请日：1994-12-19

申请人： Eric T. Eaton ,  Von A. Mock ,  John J. Parkes

发明人： Eric T. Eaton ,  Von A. Mock ,  John J. Parkes

IPC分类号： H04B1/40 ,  H04B1/16 ,  H04B7/26 ,  H04W52/02 ,  H04B7/00

CPC分类号： H04W52/0238

摘要： A method for battery saving in a battery powered radio communication device having a receiver for receiving a radio frequency (RF) signal comprises the step of enabling (100) the receiver for reception of the RF signal. The method further comprises the steps of determining (120) that the RF signal is being received at an off-signal data rate different from an on-signal data rate at which data is normally provided to the battery powered radio communication device and disabling (130) the receiver in response to determining that the RF signal is being received at the off-signal data rate.

摘要翻译： 一种具有用于接收射频（RF）信号的接收机的电池供电无线电通信装置中的电池节省方法，包括使接收机能够（100）接收RF信号的步骤。 所述方法还包括以下步骤：确定（120）所述RF信号正在与通常提供给所述电池供电的无线电通信设备的数据的接通信号数据速率不同的非信号数据速率被接收，并且禁用（130 ）接收器，以响应于确定以所述断开信号数据速率接收所述RF信号。

公开(公告)号：US5481226A

公开(公告)日：1996-01-02

申请号：US329103

申请日：1994-10-25

申请人： John J. Parkes, Jr.

发明人： John J. Parkes, Jr.

IPC分类号： H03G3/30 ,  H04B1/06

CPC分类号： H03G3/3052

摘要： A low-voltage IF amplifier (112) provides automatic gain control (AGC) of a source amplifier (104) supplying an IF input signal to the IF amplifier (112). The IF amplifier (112) includes cascaded amplifier stages (202) that include an amplifier element (344) having an input (122) for receiving a stage input signal, and an output (124) for generating an amplified stage output signal in response. The amplifier stages (202) also include a received signal strength detector (346), or RSSD, for generating a gain control current responsive to the stage input signal. The IF amplifier (112) also includes a current summer (206) for summing the gain control currents generated by the RSSDs (346) to produce a total gain control current, and a gain control element (204) that controls the gain of the source amplifier (104) in response to the total gain control current, such that signal levels within the source amplifier (104) are maintained within a linear operating range.

摘要翻译： 低压IF放大器（112）提供向IF放大器（112）提供IF输入信号的源放大器（104）的自动增益控制（AGC）。 IF放大器（112）包括级联放大器级（202），其包括具有用于接收级输入信号的输入端（122）的放大器元件（344）和用于响应地产生放大级输出信号的输出端（124）。 放大器级（202）还包括接收信号强度检测器（346）或RSSD，用于响应于级输入信号产生增益控制电流。 IF放大器（112）还包括用于对由RSSD（346）产生的增益控制电流求和以产生总增益控制电流的电流加法器（206），以及控制源的增益的增益控制元件（204） 放大器（104），以使源放大器（104）内的信号电平保持在线性工作范围内。

公开(公告)号：US07847524B2

公开(公告)日：2010-12-07

申请号：US12691301

申请日：2010-01-21

申请人： John J. Parkes, Jr. ,  Kai Zhong

发明人： John J. Parkes, Jr. ,  Kai Zhong

IPC分类号： H02P11/00 ,  H02P9/00

CPC分类号： G05F1/571

摘要： A circuit includes a voltage regulator (208) for outputting a voltage at a regulated level, a protection circuit (260), and a load circuit (210) coupled to the voltage regulator. The protection circuit includes means for preventing the voltage regulator from outputting a voltage at a level higher than the regulated level during a start-up period of the voltage regulator.

公开(公告)号：US20100172163A1

公开(公告)日：2010-07-08

申请号：US12691301

申请日：2010-01-21

申请人： John J. Parkes, JR. ,  Kai Zhong

发明人： John J. Parkes, JR. ,  Kai Zhong

IPC分类号： H02M1/36

CPC分类号： G05F1/571

摘要： A circuit includes a voltage regulator (208) for outputting a voltage at a regulated level, a protection circuit (260), and a load circuit (210) coupled to the voltage regulator. The protection circuit includes means for preventing the voltage regulator from outputting a voltage at a level higher than the regulated level during a start-up period of the voltage regulator.

摘要翻译： 电路包括用于输出调节电平的电压调节器（208），保护电路（260）和耦合到电压调节器的负载电路（210）。 保护电路包括用于在电压调节器的启动期间防止电压调节器输出高于调节电平的电平的装置。