公开(公告)号：US08460985B2

公开(公告)日：2013-06-11

申请号：US12829977

申请日：2010-07-02

Applicant: Bo-Kyoung Ahn ,  Seon-Pil Jang ,  Gug-Rae Jo ,  Hong-Suk Yoo ,  Chang-Hoon Kim ,  Min-Uk Kim ,  Ju-Han Bae

Inventor： Bo-Kyoung Ahn ,  Seon-Pil Jang ,  Gug-Rae Jo ,  Hong-Suk Yoo ,  Chang-Hoon Kim ,  Min-Uk Kim ,  Ju-Han Bae

IPC: H01L21/336

CPC classification number: H01L21/02628 ,  C23C18/1212 ,  C23C18/1216 ,  C23C18/14 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02614 ,  H01L21/268 ,  H01L27/1225 ,  H01L29/7869

Abstract: A method of manufacturing a semiconductor for a transistor that includes forming a precursor layer by coating a surface of an insulation substrate with a precursor solution for an oxide semiconductor, forming an oxide semiconductor by oxidizing a portion of the precursor layer, and removing a remaining precursor layer except for the oxide semiconductor.

Abstract translation: 一种制造用于晶体管的半导体的方法，其包括通过用氧化物半导体的前体溶液涂覆绝缘基板的表面来形成前体层，通过氧化前体层的一部分形成氧化物半导体，以及除去剩余的前体 除了氧化物半导体。

公开(公告)号：US08059329B2

公开(公告)日：2011-11-15

申请号：US11867215

申请日：2007-10-04

Applicant: Keun-Kyu Song ,  Ju-Han Bae ,  Seong-Sik Shin ,  Bo-Sung Kim

Inventor： Keun-Kyu Song ,  Ju-Han Bae ,  Seong-Sik Shin ,  Bo-Sung Kim

IPC: G02B26/00 ,  G09G3/34

CPC classification number: G02F1/167 ,  G02F1/1362 ,  G02F2001/1676 ,  G02F2201/08 ,  G02F2201/34

Abstract: A display substrate includes an insulation substrate, a gate line formed on the insulation substrate, a data line formed on the insulation substrate and crossing the gate line, a switching element formed on the insulation substrate and electrically connected to the gate line and the data line, and a pixel electrode formed on the insulation substrate. The pixel electrode is electrically connected to the switching element and includes a reflective electrode layer which reflects light and an absorption electrode layer which absorbs light.

Abstract translation: 显示基板包括绝缘基板，形成在绝缘基板上的栅极线，形成在绝缘基板上并与栅极线交叉的数据线，形成在绝缘基板上并电连接到栅极线和数据线的开关元件 以及形成在绝缘基板上的像素电极。 像素电极电连接到开关元件，并且包括反射光的反射电极层和吸收光的吸收电极层。

公开(公告)号：US20110266956A1

公开(公告)日：2011-11-03

申请号：US13181372

申请日：2011-07-12

Applicant: Dae-Jin PARK ,  Kyu-Young Kim ,  Hyung-Il Jeon ,  Ju-Han Bae

Inventor： Dae-Jin PARK ,  Kyu-Young Kim ,  Hyung-Il Jeon ,  Ju-Han Bae

IPC: H01J7/44 ,  H01L21/84 ,  H01J9/02

CPC classification number: H01L27/1248 ,  H01L27/1255

Abstract: A display apparatus includes a substrate; a first insulating layer formed on the substrate and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features; a first storage electrode overlaying the upper surface and a side surface of the first insulating layer and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features, each concave feature of the first storage electrode overlying at least one respective concave feature of the first insulating layer, each convex feature of the first storage electrode overlying at least one respective convex feature of the first insulating layer; a second insulating layer formed on the first storage electrode; and a second storage electrode formed on the second insulating layer which separates the second storage electrode from the underlying first storage electrode.

Abstract translation: 显示装置包括：基板; 形成在所述基板上并具有包括包括一个或多个凹形特征和一个或多个凸形特征的凹凸区域的上表面的第一绝缘层; 覆盖第一绝缘层的上表面和侧表面的第一存储电极，并且具有包括一个或多个凹形特征和一个或多个凸形特征的凹凸区域的上表面，第一存储电极的每个凹形特征覆盖 所述第一绝缘层的至少一个相应的凹形特征，所述第一存储电极的每个凸起特征覆盖所述第一绝缘层的至少一个相应的凸起特征; 形成在所述第一存储电极上的第二绝缘层; 以及形成在所述第二绝缘层上的第二存储电极，所述第二绝缘层将所述第二存储电极与所述第一存储电极分离。

公开(公告)号：US07989813B2

公开(公告)日：2011-08-02

申请号：US12143996

申请日：2008-06-23

Applicant: Dae-Jin Park ,  Kyu-Young Kim ,  Hyung-Il Jeon ,  Ju-Han Bae

Inventor： Dae-Jin Park ,  Kyu-Young Kim ,  Hyung-Il Jeon ,  Ju-Han Bae

IPC: H01L27/14

CPC classification number: H01L27/1248 ,  H01L27/1255

Abstract: A display apparatus includes a substrate; a first insulating layer formed on the substrate and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features; a first storage electrode overlaying the upper surface and a side surface of the first insulating layer and having an upper surface including a concavo-convex area including one or more concave features and one or more convex features, each concave feature of the first storage electrode overlying at least one respective concave feature of the first insulating layer, each convex feature of the first storage electrode overlying at least one respective convex feature of the first insulating layer; a second insulating layer formed on the first storage electrode; and a second storage electrode formed on the second insulating layer which separates the second storage electrode from the underlying first storage electrode.

Abstract translation: 显示装置包括：基板; 形成在所述基板上并具有包括包括一个或多个凹形特征和一个或多个凸形特征的凹凸区域的上表面的第一绝缘层; 覆盖第一绝缘层的上表面和侧表面的第一存储电极，并且具有包括一个或多个凹形特征和一个或多个凸形特征的凹凸区域的上表面，第一存储电极的每个凹形特征覆盖 所述第一绝缘层的至少一个相应的凹形特征，所述第一存储电极的每个凸起特征覆盖所述第一绝缘层的至少一个相应的凸起特征; 形成在所述第一存储电极上的第二绝缘层; 以及形成在所述第二绝缘层上的第二存储电极，所述第二绝缘层将所述第二存储电极与所述第一存储电极分离。

公开(公告)号：US20110129952A1

公开(公告)日：2011-06-02

申请号：US13024898

申请日：2011-02-10

Applicant: Ju-Han BAE ,  Jang-Kyum KIM

Inventor： Ju-Han BAE ,  Jang-Kyum KIM

IPC: H01L33/58

CPC classification number: G02F1/1362 ,  G02F1/13458 ,  G02F1/136227 ,  G02F2001/136222 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/1288

Abstract: A thin film transistor substrate includes a color filter layer and a gate line. The color filter layer has a reverse taper shape, which is used to pattern the gate line without a separate mask. Thus, the total number of masks used to manufacture the thin film transistor substrate can be reduced, thereby reducing the manufacturing cost and improving the productivity.

Abstract translation: 薄膜晶体管基板包括滤色器层和栅极线。 滤色器层具有反向锥形形状，其用于在没有单独的掩模的情况下对栅极线进行图案化。 因此，可以减少用于制造薄膜晶体管基板的掩模的总数，从而降低制造成本并提高生产率。

公开(公告)号：US20100072483A1

公开(公告)日：2010-03-25

申请号：US12474116

申请日：2009-05-28

Applicant: Ju-Han Bae ,  Kyu-Young Kim

Inventor： Ju-Han Bae ,  Kyu-Young Kim

IPC: H01L33/00 ,  H01L21/336

CPC classification number: H01L27/283 ,  H01L51/0545 ,  H01L51/102 ,  H01L51/107

Abstract: A thin film transistor array panel according to the present invention includes: a gate line formed on a substrate and including a gate electrode; a gate insulating layer formed on the gate electrode; a mold layer formed on the gate insulating layer and having an opening overlapping the gate electrode; a semiconductor layer filled in the opening; a data line formed on the mold layer and including a source electrode contacted with the semiconductor layer; a drain electrode contacted with the semiconductor layer on the mold layer and facing the source electrode; a passivation layer formed on the data line and the drain electrode; and a pixel electrode formed on the passivation layer and connected to the drain electrode, wherein the passivation layer, the source electrode, and the drain electrode have at least one through-hole connected to the opening.

Abstract translation: 根据本发明的薄膜晶体管阵列面板包括：形成在基板上并包括栅电极的栅极线; 形成在所述栅电极上的栅极绝缘层; 形成在所述栅绝缘层上且具有与所述栅电极重叠的开口的模层; 填充在开口中的半导体层; 形成在所述模具层上并且包括与所述半导体层接触的源电极的数据线; 漏电极，与模具层上的半导体层接触并面对源电极; 形成在数据线和漏电极上的钝化层; 以及形成在所述钝化层上并连接到所述漏电极的像素电极，其中所述钝化层，所述源电极和所述漏电极具有连接到所述开口的至少一个通孔。

公开(公告)号：US20100038647A1

公开(公告)日：2010-02-18

申请号：US12369646

申请日：2009-02-11

Applicant: Seung-Hwan CHO ,  Bo-Sung Kim ,  Jung-Han Shin ,  Ju-Han Bae

Inventor： Seung-Hwan CHO ,  Bo-Sung Kim ,  Jung-Han Shin ,  Ju-Han Bae

IPC: H01L33/00 ,  H01L29/786

CPC classification number: G02F1/133555 ,  G02F1/133504 ,  G02F1/133526 ,  G02F1/136227 ,  H01L27/1292

Abstract: A thin film transistor substrate according to one or more embodiments of the present invention includes a gate line formed on a substrate, a data line that is insulated from and intersects the gate line, a thin film transistor connected to the gate line and the data line, a barrier rub formed on the thin film transistor and partitioning a plurality of first openings, a reflecting electrode formed in each of the first openings, and a pixel electrode formed on the reflecting electrode and that is electrically connected to the thin film transistor.

Abstract translation: 根据本发明的一个或多个实施例的薄膜晶体管基板包括形成在基板上的栅极线，与栅极线绝缘并与之相交的数据线，连接到栅极线和数据线的薄膜晶体管 形成在薄膜晶体管上并分隔多个第一开口的阻挡擦拭物，形成在每个第一开口中的反射电极以及形成在反射电极上且与薄膜晶体管电连接的像素电极。

公开(公告)号：US20090152555A1

公开(公告)日：2009-06-18

申请号：US12273446

申请日：2008-11-18

Applicant: Dae-Jin Park ,  Jang-Kyum Kim ,  Ju-Han Bae

Inventor： Dae-Jin Park ,  Jang-Kyum Kim ,  Ju-Han Bae

IPC: H01L21/77 ,  H01L27/088

CPC classification number: G02F1/133555 ,  G02F1/133371 ,  G02F2001/136222 ,  H01L27/1248

Abstract: A thin film transistor display substrate comprises a base substrate on which a pixel area including a first reflection area and a second reflection area is defined. A gate line formed on the base substrate and a data line formed on the base substrate. The data line is insulated from and intersected with the gate line to define the pixel area. A thin film transistor is formed in the pixel area and connected to the gate line and the data line. A first reflection layer is formed on the base substrate and corresponds to the first reflection area. A color filter is formed on the first reflection layer and corresponds to the pixel area. A second reflection layer is formed on the color filter and corresponds to the second reflection area. A pixel electrode is formed on the color filter and is electrically connected to the thin film transistor.

Abstract translation: 薄膜晶体管显示基板包括其上限定了包括第一反射区域和第二反射区域的像素区域的基底基板。 形成在基底基板上的栅极线和形成在基底基板上的数据线。 数据线与栅极线绝缘并与栅极线相交，以定义像素区域。 在像素区域中形成薄膜晶体管，并连接到栅极线和数据线。 第一反射层形成在基底基板上，对应于第一反射区域。 滤色器形成在第一反射层上，对应于像素区域。 第二反射层形成在滤色器上并对应于第二反射区域。 像素电极形成在滤色器上并与薄膜晶体管电连接。

公开(公告)号：US20080309613A1

公开(公告)日：2008-12-18

申请号：US12022499

申请日：2008-01-30

Applicant: Ju-Han BAE

Inventor： Ju-Han BAE

IPC: G09G3/34

CPC classification number: G02F1/167 ,  G02F1/136209 ,  G02F2001/136222 ,  G02F2001/13629

Abstract: An electrophoretic display includes a thin film transistor array panel including a first substrate, a gate line on the first substrate having a gate electrode, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, a data line including a source electrode and a drain electrode on the semiconductor or the gate insulating layer, a passivation layer covering the data line and having a first contact hole exposing the drain electrode, a storage electrode on the passivation layer, a color filter on the storage electrode and having a second contact hole exposing the first contact hole, and a pixel electrode on the color filter and connected to the drain electrode; a common electrode panel facing the thin film transistor array panel, and including a common electrode, and a electrophoretic member between the pixel electrode and the common electrode.

Abstract translation: 电泳显示器包括薄膜晶体管阵列面板，其包括第一衬底，在第一衬底上具有栅电极的栅极线，栅极线上的栅极绝缘层，栅极绝缘层上的半导体，包括源极的数据线 在半导体或栅极绝缘层上的电极和漏电极，覆盖数据线并具有暴露漏电极的第一接触孔，钝化层上的存储电极，存储电极上的滤色器的钝化层， 暴露第一接触孔的第二接触孔和滤色器上的像素电极并连接到漏电极; 面对薄膜晶体管阵列面板的公共电极面板，并且包括公共电极，以及像素电极和公共电极之间的电泳部件。

公开(公告)号：US20080084364A1

公开(公告)日：2008-04-10

申请号：US11869240

申请日：2007-10-09

Applicant: Ju-Han BAE ,  Hyng-il Jeon

Inventor： Ju-Han BAE ,  Hyng-il Jeon

IPC: G09G3/20

CPC classification number: H01L27/1288 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2300/0439 ,  H01L27/1214 ,  H01L27/1255

Abstract: Disclosed is a display substrate including a pixel electrode and a thin film transistor formed thereon. The thin film transistor includes a gate electrode, a source electrode, and a drain electrode, and the pixel electrode is formed by extending the drain electrode thereby reducing the required number of process steps and photo masks.

Abstract translation: 公开了一种显示基板，包括形成在其上的像素电极和薄膜晶体管。 薄膜晶体管包括栅电极，源电极和漏电极，并且通过延伸漏极形成像素电极，从而减少所需数量的工艺步骤和光掩模。