Data management method for memory device
    3.
    发明授权
    Data management method for memory device 失效
    存储器件的数据管理方法

    公开(公告)号:US06889287B2

    公开(公告)日:2005-05-03

    申请号:US10149552

    申请日:2001-10-12

    Applicant: Junko Sasaki

    Inventor: Junko Sasaki

    CPC classification number: G06F12/0246 G06F12/0292

    Abstract: A data read request for a logical address Nlog is supplied from a host system to a memory apparatus. A data processing portion calculates a physical block number Nphy corresponding to the logical address Nlog using a logical-physical conversion criterion value NBASE and a logical-physical conversion multiplier NMUL of the mapping reference information. By referencing an unusable block correlation table, it is determined whether the physical block number Nphy represents an unusable block. When the physical block number Nphy represents an unusable block, a substitute block number replaces the physical block number Nphy. The data located at the physical block number Nphy or at the substitute block number is then read from a memory portion. The read data is supplied from the data processing portion to a communicating portion which supplies the read data to the host system.

    Abstract translation: 从主机系统向存储器装置提供对逻辑地址N 的数据读取请求。 数据处理部分使用逻辑 - 物理转换标准值N SUB BASE来计算与逻辑地址N> log<>相对应的物理块号码N SUB, 映射参考信息的逻辑 - 物理转换乘数N MUL 。 通过引用不可用的块相关表,确定物理块号N SUB是否表示不可用的块。 当物理块号N SUB表示不可用块时,替代块号代替物理块号N SUB phy。 然后从存储器部分读取位于物理块编号N> phy / /或替代块编号处的数据。 读取数据从数据处理部分提供给将读取的数据提供给主机系统的通信部分。

    Data memory
    4.
    发明申请
    Data memory 失效
    数据存储器

    公开(公告)号:US20050086433A1

    公开(公告)日:2005-04-21

    申请号:US10499646

    申请日:2003-10-07

    CPC classification number: G06K19/07732 G06K7/0013 G06K19/072 G06K19/077

    Abstract: This invention provides a memory card (1) that is to be used as a storage medium in a host apparatus that can record and reproduce data. The memory card has a first memory (12-1), a second memory (12-2), a first switch (13) for changing over one memory to the other, and a second switch (14) for connecting and disconnecting an insertion/removal detecting terminal INS. The first and second switches work as a slide switch (6) provided on the housing is operated. The first switch has a contact for selecting the first memory, a contact for selecting the second memory, and a contact located between these two contacts, for selecting neither memory. The second switch connects the terminal INS to the ground while the first switch remains connected to the contact for selecting the first memory or the contact for selecting the second memory. The second switch opens the terminal INS while the first switch remains connected to the contact for selecting neither memory.

    Abstract translation: 本发明提供一种存储卡(1),其用作可以记录和再现数据的主机设备中的存储介质。 存储卡具有第一存储器(12-1),第二存储器(12-2),用于将一个存储器切换到另一存储器的第一开关(13)和用于连接和断开插入件的第二开关(14) /去除检测端子INS。 第一和第二开关的作用是设置在壳体上的滑动开关(6)。 第一开关具有用于选择第一存储器的触点,用于选择第二存储器的触点,以及位于这两个触点之间的触点,用于不选择存储器。 第二开关将端子INS连接到地,同时第一开关保持连接到触点用于选择第一存储器或用于选择第二存储器的触点。 第二开关打开端子INS,而第一开关保持连接到触点用于选择两个存储器。

    Quinazoline derivatives as kinase inhibitors
    5.
    发明授权
    Quinazoline derivatives as kinase inhibitors 失效
    喹唑啉衍生物作为激酶抑制剂

    公开(公告)号:US08324205B2

    公开(公告)日:2012-12-04

    申请号:US12471280

    申请日:2009-05-22

    CPC classification number: C07D239/94 A61K31/517 C07D401/12 C07D403/12

    Abstract: The present invention relates to nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which have inhibitory activity on the phosphorylation of kinases, which inhibits the activity of such kinases. The invention is also related to a method of inhibiting kinases and treating disease states in a mammal by inhibiting the phosphorylation of kinases. In a particular aspect the present invention provides nitrogen-containing heterocyclic compounds and pharmaceutically acceptable salts thereof which inhibit phosphorylation of a PDGF receptor to hinder abnormal cell growth and cell wandering, and a method for preventing or treating cell-proliferative diseases such as arteriosclerosis, vascular reobstruction, cancer and glomerulosclerosis.

    Abstract translation: 本发明涉及对抑制这种激酶活性的激酶磷酸化具有抑制活性的含氮杂环化合物及其药学上可接受的盐。 本发明还涉及通过抑制激酶的磷酸化来抑制哺乳动物的激酶和治疗疾病状态的方法。 在一个特定方面,本发明提供了抑制PDGF受体的磷酸化以阻止异常细胞生长和细胞游动的含氮杂环化合物及其药学上可接受的盐,以及预防或治疗细胞增殖性疾病如动脉硬化,血管 重建,癌症和肾小球硬化症。

    Memory device and controlling method for elongating the life of nonvolatile memory
    6.
    发明授权
    Memory device and controlling method for elongating the life of nonvolatile memory 失效
    用于延长非易失性存储器寿命的存储器件和控制方法

    公开(公告)号:US07647470B2

    公开(公告)日:2010-01-12

    申请号:US11207340

    申请日:2005-08-19

    CPC classification number: G06F12/0246

    Abstract: A memory device and controlling method for nonvolatile memory are provided. The memory device and the controlling method for a nonvolatile memory are provided by which, where a file management system wherein there is a tendency that lower logic addresses are used frequently like the MS-DOS is adopted, physical blocks of a flash memory are used in an averaged fashion and the life of the flash memory can be elongated thereby.

    Abstract translation: 提供了一种用于非易失性存储器的存储器件和控制方法。 提供了一种用于非易失性存储器的存储器件和控制方法,其中采用如MS-DOS那样经常使用较低逻辑地址的趋势的文件管理系统,其中使用闪速存储器的物理块 平均的时尚和闪存的使用寿命可以延长。

    Data storage apparatus that includes a plurality of nonvolatile memories in which no data is erased after the data storage apparatus is removed from a host apparatus
    7.
    发明授权
    Data storage apparatus that includes a plurality of nonvolatile memories in which no data is erased after the data storage apparatus is removed from a host apparatus 失效
    数据存储装置,其包括多个非易失性存储器,在数据存储装置从主机装置中移除之后,没有数据被擦除

    公开(公告)号:US07490198B2

    公开(公告)日:2009-02-10

    申请号:US10499646

    申请日:2003-10-07

    CPC classification number: G06K19/07732 G06K7/0013 G06K19/072 G06K19/077

    Abstract: This invention provides a memory card (1) that is to be used as a storage medium in a host apparatus that can record and reproduce data. The memory card has a first memory (12-1), a second memory (12-2), a first switch (13) for changing over one memory to the other, and a second switch (14) for connecting and disconnecting an insertion/removal detecting terminal INS. The first and second switches work as a slide switch (6) provided on the housing is operated. The first switch has a contact for selecting the first memory, a contact for selecting the second memory, and a contact located between these two contacts, for selecting neither memory. The second switch connects the terminal INS to the ground while the first switch remains connected to the contact for selecting the first memory or the contact for selecting the second memory. The second switch opens the terminal INS while the first switch remains connected to the contact for selecting neither memory.

    Abstract translation: 本发明提供一种存储卡(1),其用作可以记录和再现数据的主机设备中的存储介质。 存储卡具有第一存储器(12-1),第二存储器(12-2),用于将一个存储器切换到另一存储器的第一开关(13)和用于连接和断开插入件的第二开关(14) /去除检测端子INS。 第一和第二开关的作用是设置在壳体上的滑动开关(6)。 第一开关具有用于选择第一存储器的触点,用于选择第二存储器的触点和位于这两个触点之间的触点,用于既不选择存储器也不选择。 第二开关将端子INS连接到地,同时第一开关保持连接到触点用于选择第一存储器或用于选择第二存储器的触点。 第二开关打开端子INS,而第一开关保持连接到触点用于选择两个存储器。

    Data storage apparatus detachably mounted to a host apparatus
    8.
    发明授权
    Data storage apparatus detachably mounted to a host apparatus 有权
    可拆卸地安装到主机装置的数据存储装置

    公开(公告)号:US07472251B2

    公开(公告)日:2008-12-30

    申请号:US10480760

    申请日:2003-04-14

    Applicant: Junko Sasaki

    Inventor: Junko Sasaki

    Abstract: A data storage device including a non-volatile semiconductor memory and an attribute information storage unit. In an attribute information storage unit of the data storage device, there are stored the number of sectors in one block and the information indicating the logical address of a sector lying at a block boundary. A host device, on which is mounted the data storage device, grasps the number of clusters that make up one block in the data storage device and the location of the leading cluster position of the block and records the data on the block basis.

    Abstract translation: 一种包括非易失性半导体存储器和属性信息存储单元的数据存储装置。 在数据存储装置的属性信息存储单元中,存储一个块中的扇区数,以及表示位于块边界的扇区的逻辑地址的信息。 在其上装载数据存储装置的主机装置掌握构成数据存储装置中的一个块的簇的数量和块的前导簇位置的位置,并以块为基础记录数据。

    Data storage device, method for updating management information in data storage device, and computer program
    9.
    发明授权
    Data storage device, method for updating management information in data storage device, and computer program 失效
    数据存储装置,用于更新数据存储装置中的管理信息的方法和计算机程序

    公开(公告)号:US07444460B2

    公开(公告)日:2008-10-28

    申请号:US10514985

    申请日:2004-03-05

    CPC classification number: G06F11/1435

    Abstract: The invention provides a data storage device and a method of updating management information, capable of dealing with management information in a highly reliable manner so that information is not easily lost when an error occurs. File management information such as a FAT serving as address management information in a flash memory is stored in a management information area of the memory, a pair of blocks is assigned as blocks for use to store data of the FAT, and writing of updated FAT information is performed by alternately using the two blocks of the block pair such that previous FAT information is retained in one of the two blocks of the block pair, and updated FAT information is written in the other block of the block pair, whereby, even when an error occurs in the middle of the process of writing the updated management information, a process using the retained previous FAT information is possible.

    Abstract translation: 本发明提供了一种数据存储装置和更新管理信息的方法,能够以高度可靠的方式处理管理信息,使得当发生错误时信息不容易丢失。 诸如作为闪速存储器中的地址管理信息的FAT的文件管理信息被存储在存储器的管理信息区域中,一对块被分配为用于存储FAT的数据的块,并且更新的FAT信息的写入 通过交替使用块对的两个块来执行,使得先前的FAT信息保留在块对的两个块中的一个块中,并且更新的FAT信息被写入块对的另一个块中,从而即使当 在编写更新的管理信息的过程的中间发生错误,可以使用保留的以前的FAT信息的处理。

    Data managing method for memory apparatus

    公开(公告)号:US07284090B2

    公开(公告)日:2007-10-16

    申请号:US11115714

    申请日:2005-04-27

    Applicant: Junko Sasaki

    Inventor: Junko Sasaki

    CPC classification number: G06F12/0246 G06F12/0292

    Abstract: A block correlation table includes block addresses of unusable block portions in an irreversibly writeable memory and includes addresses of associated substitute block portions in the irreversibly writeable memory. A request for data stored at a logical address is received from a host processor. A physical address in the irreversibly writeable memory is calculated from the logical address using a fixed mathematical relation. The physical address is compared with the block addresses in the block correlation table. When the physical address does not match any of the block addresses in the table, the irreversibly writeable memory is referenced to read data stored at the physical address, and when the physical address matches one of the block addresses in the table, the irreversibly writeable memory is referenced to read data stored at the address of its associated substitute block portion. The read data is transmitted to the host processor.

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