公开(公告)号：US07622967B2

公开(公告)日：2009-11-24

申请号：US11902168

申请日：2007-09-19

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： H03L7/06

CPC分类号： H03H11/16 ,  H03L7/0812 ,  H03L7/085 ,  H03L7/093

摘要： Disclosed is a phase shifting circuit that includes a PLL loop in which a reference frequency received is branched into first and second signals. The first signal becomes one input to a phase comparator and the second signal becomes another input to the phase comparator after being shifted in phase via a phase shifter. The output of the phase comparator is supplied to one input terminal of a differential amplifier via a low-pass filter. The amount of phase shift of the phase shifter is controlled by the output signal of the differential amplifier. The amount of phase shift of the phase shifter is decided by a reference voltage applied to another input terminal of the differential amplifier.

摘要翻译： 公开了一种移相电路，其包括其中所接收的参考频率被分支为第一和第二信号的PLL环路。 第一个信号成为相位比较器的一个输入端，第二个信号通过移相器在相位相移之后成为相位比较器的另一个输入。 相位比较器的输出通过低通滤波器提供给差分放大器的一个输入端。 移相器的相移量由差分放大器的输出信号控制。 移相器的相移量由施加到差分放大器的另一输入端的参考电压决定。

公开(公告)号：US07586366B2

公开(公告)日：2009-09-08

申请号：US11703177

申请日：2007-02-07

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： H03B1/00 ,  H03K5/00

CPC分类号： H03H11/04 ,  H03H11/08 ,  H03H11/1247 ,  H03H11/1252 ,  H03H2011/0494

摘要： Disclosed is a complex elliptic filter having an order of three or higher which receives two differential signals that differ in phase from each other by 90 degrees are applied and outputs two differential signals that differ in phase from each other by 90 degrees. The complex filter circuit has internally at least two circuit blocks that include a capacitor connected in series with a coupler (gyrator). The complex filter is a third-order inverse Chebychev filter having an equiripple stopband of 40-dB attenuation amount. Alternatively, the coupler (gyrator) between elliptic capacitors is removed. Alternatively, the elliptic capacitors are made substantially equal to the capacitor arranged in parallel therewith. Alternatively, the gm value of an OTA and the capacitance value are each in an integral ratio represented substantially by a geometric progression of 2.

摘要翻译： 公开了一种具有三个或更高数量级的复数椭圆滤波器，其接收两个彼此相差90度的差分信号，并输出相位相差90度的两个差分信号。 复合滤波器电路具有内部至少两个电路块，其包括与耦合器（回转器）串联连接的电容器。 复数滤波器是具有40dB衰减量的等腰截止频率的三阶逆切比雪夫滤波器。 或者，去除椭圆形电容器之间的耦合器（回转器）。 或者，使椭圆形电容器基本上等于与其平行设置的电容器。 或者，OTA的gm值和电容值各自以基本上由几何级数2表示的整数比率。

公开(公告)号：US20090121772A1

公开(公告)日：2009-05-14

申请号：US12289125

申请日：2008-10-21

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G06G7/16

CPC分类号： G06G7/16

摘要： Disclosed is a multiplier circuit including first and second squaring circuits comprising first and second differential MOS transistors respectively connected in cascode to first and second diode-connected MOS transistors. The first squaring circuit receives a differential sum voltage of a first input voltage and a second input voltage. The second squaring circuit receives a differential subtraction voltage of the first input voltage and the second input voltage. Outputs of the first and second squaring circuits are first and second terminal voltages of the first and second diode-connected MOS transistors. A differential voltage between the first and second terminal voltages corresponds to the product of the first and second input voltages.

摘要翻译： 公开了一种乘法器电路，包括第一和第二平方电路，该第一和第二平方电路包括分别以共源共栅连接到第一和第二二极管连接的MOS晶体管的第一和第二差分MOS晶体 第一平方电路接收第一输入电压和第二输入电压的差分和电压。 第二平方电路接收第一输入电压和第二输入电压的差分减法电压。 第一和第二平方电路的输出是第一和第二二极管连接的MOS晶体管的第一和第二端电压。 第一和第二端子电压之间的差分电压对应于第一和第二输入电压的乘积。

公开(公告)号：US07429854B2

公开(公告)日：2008-09-30

申请号：US11262940

申请日：2005-11-01

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G05F3/16

CPC分类号： G05F3/262

摘要： Disclosed is a CMOS current mirror circuit including a first MOS transistor and a second MOS transistor constituting a current mirror, in which a drain of the first MOS transistor and a gate of the second MOS transistor are connected in common, a source of the first MOS transistor is directly grounded, and a gate of the first MOS transistor is connected to the drain of the first MOS transistor through a third MOS transistor which has a source connected to the drain of the first MOS transistor, a drain connected to the gate of the first MOS transistor, and a gate being biased. The source of the second MOS transistor is directly grounded. Current is input to the drain of the third MOS transistor. The drain current of the second MOS transistor is mirrored by cascode current mirror circuits. An output current is output from the source of a MOS transistor for conversion to a voltage by a circuit that receives the current which outputs a reference voltage.

摘要翻译： 公开了一种CMOS电流镜电路，包括构成电流镜的第一MOS晶体管和第二MOS晶体管，其中第一MOS晶体管的漏极和第二MOS晶体管的栅极共同连接，第一MOS的源极 晶体管直接接地，并且第一MOS晶体管的栅极通过第三MOS晶体管连接到第一MOS晶体管的漏极，第三MOS晶体管的源极连接到第一MOS晶体管的漏极，漏极连接到第一MOS晶体管的栅极 第一MOS晶体管，并且栅极被偏置。 第二个MOS晶体管的源极直接接地。 电流被输入到第三MOS晶体管的漏极。 第二MOS晶体管的漏极电流由共源共栅电流镜电路镜像。 通过接收输出参考电压的电流的电路，从MOS晶体管的源极输出输出电流，以转换为电压。

公开(公告)号：US20080129272A1

公开(公告)日：2008-06-05

申请号：US11907621

申请日：2007-10-15

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G05F3/20

CPC分类号： G05F3/30

摘要： Disclosed is a reference voltage generating circuit including first to third current-to-voltage converter circuits, a control circuit for exercising control so that the terminal voltage of the first current-to-voltage converter circuit is made equal to that of the second current-to-voltage converter circuit, and current mirror circuits for driving the first to third current-to-voltage converter circuits. A preset voltage of the third current-to-voltage converter circuit is used as a reference voltage. The first current-to-voltage converter circuit is composed of a diode. The second current-to-voltage converter circuit includes a plurality of parallel connected diodes, a resistor connected in parallel with the plural parallel connected diodes and a resistor connected in series with the parallel-connected diodes and the resistor. The third current-to-voltage converter circuit is composed of a resistor.

公开(公告)号：US20080106335A1

公开(公告)日：2008-05-08

申请号：US11905483

申请日：2007-10-01

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： H03F3/45 ,  G06G7/12

CPC分类号： H03F3/45197 ,  H03F1/3211 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45632 ,  H03F2203/45024 ,  H03F2203/45062 ,  H03F2203/45318 ,  H03F2203/45352 ,  H03F2203/45354 ,  H03F2203/45356 ,  H03F2203/45366 ,  H03F2203/45454 ,  H03F2203/45471 ,  H03F2203/45644 ,  H03F2203/45648 ,  H03F2203/45652

摘要： Disclosed is a differential circuit including a first transistor pair including first and second transistors having gates for receiving a differential input signal; a second transistor pair including third and fourth transistors having gates for commonly receiving a common mode voltage of the differential input signal, having drains connected to drains of said first and second transistors, respectively, and having sources coupled together; a third transistor pair including fifth and sixth transistors having gates for receiving the differential input signal, and cascode-connected to said third and fourth transistors, respectively; and a fourth transistor pair including seventh and eighth transistors having gates for receiving the differential input signal in reverse phase, and cascode-connected to said fifth and sixth transistors, respectively; wherein coupled drains of the first and third transistors and coupled drains of the second and fourth transistors constitute a differential output pair; and sources of said first, second, seventh and eighth transistors are coupled together and driven by a constant current source.

摘要翻译： 公开了一种包括第一晶体管对的差分电路，其包括具有用于接收差分输入信号的栅极的第一和第二晶体管; 第二晶体管对，其包括具有用于共同接收所述差分输入信号的共模电压的栅极的第三和第四晶体管，具有分别连接到所述第一和第二晶体管的漏极并具有耦合在一起的源极的漏极; 包括第五和第六晶体管的第三晶体管对，其具有用于接收所述差分输入信号的栅极，并且分别与所述第三和第四晶体管连接; 以及包括第七和第八晶体管的第四晶体管对，其具有用于以相反相接收差分输入信号的栅极，并且分别与所述第五和第六晶体管连接; 其中所述第一和第三晶体管的耦合漏极和所述第二和第四晶体管的耦合漏极构成差分输出对; 并且所述第一，第二，第七和第八晶体管的源极耦合在一起并由恒定电流源驱动。

公开(公告)号：US07304466B1

公开(公告)日：2007-12-04

申请号：US11657490

申请日：2007-01-25

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G05F3/16

CPC分类号： G05F3/245

摘要： Disclosed is a reference voltage generating circuit comprising a first reference current circuit including first and second current-to-voltage converting circuits, control means for exercising control in such a manner that prescribed output voltages of the first and second current-to-voltage converting circuits become equal, and a first current mirror circuit for supplying currents to respective ones of the first and second current-to-voltage converting circuits; a second reference current circuit having third and fourth current-to-voltage converting circuits, control means for exercising control in such a manner that prescribed output voltages of the third and fourth current-to-voltage converting circuits become equal, and a second current mirror circuit which has a linear input/output characteristic, for supplying currents to respective ones of the third and fourth current-to-voltage converting circuits; and means for outputting a difference current between output current of the first reference current circuit and output current of the second reference current circuit. An output voltage is obtained from the difference current via a fifth current-to-voltage converting circuit.

摘要翻译： 公开了一种参考电压产生电路，包括第一和第二电流 - 电压转换电路的第一参考电流电路，用于以这样的方式进行控制的控制装置，即第一和第二电流 - 电压转换电路的规定输出电压 变成相等的第一电流镜电路，用于向第一和第二电流 - 电压转换电路中的相应电流提供电流的第一电流镜电路; 具有第三和第四电流 - 电压转换电路的第二参考电流电路，用于以这样的方式进行控制的控制装置，即第三和第四电流 - 电压转换电路的规定输出电压变得相等;以及第二电流镜 具有线性输入/输出特性的用于向第三和第四电流 - 电压转换电路中的相应电流供电的电路; 以及用于输出第一参考电流电路的输出电流和第二参考电流电路的输出电流之间的差分电流的装置。 通过第五电流 - 电压转换电路从差动电流获得输出电压。

公开(公告)号：US20070182480A1

公开(公告)日：2007-08-09

申请号：US11703177

申请日：2007-02-07

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： H03K5/00

CPC分类号： H03H11/04 ,  H03H11/08 ,  H03H11/1247 ,  H03H11/1252 ,  H03H2011/0494

摘要： Disclosed is a complex elliptic filter having an order of three or higher which receives two differential signals that differ in phase from each other by 90 degrees are applied and outputs two differential signals that differ in phase from each other by 90 degrees. The complex filter circuit has internally at least two circuit blocks that include a capacitor connected in series with a coupler (gyrator). The complex filter is a third-order inverse Chebychev filter having an equiripple stopband of 40-dB attenuation amount. Alternatively, the coupler (gyrator) between elliptic capacitors is removed. Alternatively, the elliptic capacitors are made substantially equal to the capacitor arranged in parallel therewith. Alternatively, the gm value of an OTA and the capacitance value are each in an integral ratio represented substantially by a geometric progression of 2.

摘要翻译： 公开了一种具有三个或更高数量级的复数椭圆滤波器，其接收两个彼此相差90度的差分信号，并输出相位相差90度的两个差分信号。 复合滤波器电路具有内部至少两个电路块，其包括与耦合器（回转器）串联连接的电容器。 复数滤波器是具有40dB衰减量的等腰截止频率的三阶逆切比雪夫滤波器。 或者，去除椭圆形电容器之间的耦合器（回转器）。 或者，使椭圆形电容器基本上等于与其平行设置的电容器。 或者，OTA的gm值和电容值各自以基本上由几何级数2表示的整数比率。

公开(公告)号：US07039383B2

公开(公告)日：2006-05-02

申请号：US10307932

申请日：2002-12-03

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： H04B1/28 ,  H04B1/26

CPC分类号： H04B1/30 ,  H03D7/1433 ,  H03D7/1441

摘要： In a quadrature mixer circuit for receiving a radio frequency signal to generate first and second quadrature output signals, a first three-input mixer receives the radio frequency signal, a first local signal having a first frequency and a second local signal having a second frequency to generate the first quadrature output signal, and a second three-input mixer receives the radio frequency signal, the first local signal and the second local signal to generate the second quadrature output signal. The second local signal received by the first three-input mixer and the second local signal received by the second three-input mixer being out of phase by π/2 from each other.

公开(公告)号：US06657486B2

公开(公告)日：2003-12-02

申请号：US10234129

申请日：2002-09-05

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G06G726

CPC分类号： H03F3/45717 ,  G06G7/14 ,  H03F3/45183 ,  H03F3/4565 ,  H03F3/4569 ,  H03F3/45708 ,  H03F3/45739 ,  H03F2203/45456 ,  H03F2203/45484 ,  H03F2203/45566 ,  H03F2203/45612 ,  H03F2203/45702

摘要： A MOS differential amplifier circuit has a differential pair having first and second MOS transistors. The source electrodes of the first and second MOS transistors are commonly coupled and driven by a current source, which can be adjusted to change the transconductance of the amplifier. The circuit can be provided with a quadri-tall cell or level shifter in order to provide this operation. With these operational characteristics, the MOS differential pair of this type can be used in a voltage adder/subtractor circuit.

摘要翻译： MOS差分放大器电路具有具有第一和第二MOS晶体管的差分对。 第一和第二MOS晶体管的源极通常由电流源耦合和驱动，电流源可以被调节以改变放大器的跨导。 为了提供这种操作，该电路可以设置有四节细胞或电平移位器。 利用这些操作特性，这种类型的MOS差分对可以用在电压加法器/减法器电路中。