公开(公告)号：US20050164492A1

公开(公告)日：2005-07-28

申请号：US11087211

申请日：2005-03-23

申请人： Keiichi Naitoh ,  Toshihiro Shinohara ,  Masahiro Watanabe

发明人： Keiichi Naitoh ,  Toshihiro Shinohara ,  Masahiro Watanabe

IPC分类号： H05K3/06 ,  H05K1/00 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  H01L21/8242 ,  H01L21/44

CPC分类号： H05K3/423 ,  H05K1/0393 ,  H05K3/0017 ,  H05K3/06 ,  H05K3/061 ,  H05K3/421 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0733 ,  H05K2203/1461 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： In the present invention, a reference conductive layer and a first surface conductive layer are respectively provided on a surface and a back face of a first base film. The first base film includes a first via hole penetrating the first surface conductive layer. After a first electroless plating layer and a first conductive material are sequentially grown on a surface of the first base film, a first coating conductive layer composed of the first electroless plating layer, the first conductive material and the first surface conductive layer, is etched to have a reduced thickness. Then, the first coating conductive layer is patterned to form a first wiring layer. In this manner, a desired pattern width can be obtained even in the case where the first coating conductive layer is patterned by isotropic etching such as wet etching.

摘要翻译： 在本发明中，在第一基膜的表面和背面上分别设置参考导电层和第一表面导电层。 第一基膜包括贯穿第一表面导电层的第一通孔。 在第一基底膜的表面上依次生长第一化学镀层和第一导电材料之后，将由第一化学镀层，第一导电材料和第一表面导电层构成的第一涂层导电层蚀刻到 具有减小的厚度。 然后，将第一涂层导电层图案化以形成第一布线层。 以这种方式，即使在通过诸如湿蚀刻的各向同性蚀刻对第一涂层导电层进行图案化的情况下，也可以获得期望的图案宽度。

公开(公告)号：US07098132B2

公开(公告)日：2006-08-29

申请号：US11087211

申请日：2005-03-23

申请人： Keiichi Naitoh ,  Toshihiro Shinohara ,  Masahiro Watanabe

发明人： Keiichi Naitoh ,  Toshihiro Shinohara ,  Masahiro Watanabe

IPC分类号： H01L21/44

CPC分类号： H05K3/423 ,  H05K1/0393 ,  H05K3/0017 ,  H05K3/06 ,  H05K3/061 ,  H05K3/421 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0733 ,  H05K2203/1461 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： In the present invention, a reference conductive layer and a first surface conductive layer are respectively provided on a surface and a back face of a first base film. The first base film includes a first via hole penetrating the first surface conductive layer. After a first electroless plating layer and a first conductive material are sequentially grown on a surface of the first base film, a first coating conductive layer composed of the first electroless plating layer, the first conductive material and the first surface conductive layer, is etched to have a reduced thickness. Then, the first coating conductive layer is patterned to form a first wiring layer. In this manner, a desired pattern width can be obtained even in the case where the first coating conductive layer is patterned by isotropic etching such as wet etching.

摘要翻译： 在本发明中，在第一基膜的表面和背面上分别设置参考导电层和第一表面导电层。 第一基膜包括贯穿第一表面导电层的第一通孔。 在第一基底膜的表面上依次生长第一化学镀层和第一导电材料之后，将由第一化学镀层，第一导电材料和第一表面导电层构成的第一涂层导电层蚀刻到 具有减小的厚度。 然后，将第一涂层导电层图案化以形成第一布线层。 以这种方式，即使在通过诸如湿蚀刻的各向同性蚀刻对第一涂层导电层进行图案化的情况下，也可以获得期望的图案宽度。

公开(公告)号：US06912779B2

公开(公告)日：2005-07-05

申请号：US10646623

申请日：2003-08-22

申请人： Keiichi Naitoh ,  Toshihiro Shinohara ,  Masahiro Watanabe

发明人： Keiichi Naitoh ,  Toshihiro Shinohara ,  Masahiro Watanabe

IPC分类号： H05K3/06 ,  H05K1/00 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  H01K3/10

CPC分类号： H05K3/423 ,  H05K1/0393 ,  H05K3/0017 ,  H05K3/06 ,  H05K3/061 ,  H05K3/421 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0554 ,  H05K2203/0733 ,  H05K2203/1461 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： In the present invention, a reference conductive layer and a first surface conductive layer are respectively provided on a surface and a back face of a first base film. The first base film includes a first via hole penetrating the first surface conductive layer. After a first electroless plating layer and a first conductive material are sequentially grown on a surface of the first base film, a first coating conductive layer composed of the first electroless plating layer, the first conductive material and the first surface conductive layer, is etched to have a reduced thickness. Then, the first coating conductive layer is patterned to form a first wiring layer. In this manner, a desired pattern width can be obtained even in the case where the first coating conductive layer is patterned by isotropic etching such as wet etching.