摘要:
An integrated multimedia system having a multimedia processor is disposed in an integrated circuit having a first host processor system coupled to the multimedia processor and a second local processor disposed within the multimedia processor for controlling the operation of the multimedia processor. A data transfer switch is coupled to the second processor for transferring data to various modules of the processor, at least one of which is a data cache. The data transfer switch transfers data in either direction between the cache and a module within the processor. A data streamer schedules simultaneous data transfers among the various-modules disposed within the multimedia processor in accordance with corresponding channel allocations. An interface unit is coupled to the data streamer and has a plurality of input/output (I/O) device driver units. A plurality of external I/O devices are coupled to the plurality of I/O device driver units via a multiplexer.
摘要:
An integrated multimedia system has a multimedia processor disposed in an integrated circuit. The system comprises a first host processor system which is coupled to the multimedia processor. A second local processor is disposed within the multimedia processor which controls the operation of the multimedia processor. A data transfer switch is disposed within the multimedia processor and coupled to the second processor which transfers data to various modules of the multimedia processor. A fixed function unit is disposed within the multimedia processor, coupled to the second processor and the data transfer switch and configured to perform three dimensional graphic operations. A data streamer is coupled to the data transfer switch, and configured to schedule simultaneous data transfers among a plurality of modules disposed within the multimedia processor in accordance with the corresponding channel allocations. An interface unit is coupled to the data streamer and has a plurality of input/output (I/O) device driver units. A multiplexer is coupled to the interface unit and provides access between a selected number of I/O device driver units and external I/O devices via output pins. A plurality of external I/O devices are coupled to the multimedia processor.
摘要:
A display controller of a flat display apparatus which performs multiple color display and variable color display for display data read out of a lookup table. The lookup table comprises a parallel lookup table which has n (n.gtoreq.2) registers for storing color information and m selectors which receive n pieces of color information independently from the n registers, each select one of n pieces of color information, and deliver m pieces of color information simultaneously. The controller further comprises a data selector which selectively delivers the output of other register in the parallel lookup table in place of the register which has been made the read access.
摘要:
A liquid crystal display device providing a multi tone control function is disclosed, permitting a multi-colored display to be provided by using an analogue display data input, while regulating stepwise the brightness by varying the level of the applied voltage. The liquid crystal display device is composed of serial/parallel converter having a high sampling speed, into which liquid crystal display data are inputted, with a function of converting serial image data into parallel image data, and an X axis direction driver having a low sampling speed, into which the liquid crystal display data for one pixel are inputted, with a function of outputting the liquid crystal display data of one line in the horizontal direction, synchronized with a display line signal for a Y axis direction driver. The S/P converter and the X axis direction driver are disposed separately. Further the S/P converter and the X axis direction driver are constructed so as to hold analogue quantities in order to output the liquid crystal display data applied to the liquid crystal driving elements constituting the pixels of a liquid crystal display panel in the form of analogue signals. In this way a multi-colored display of not less than nine colors, using an analogue input, can be effected, and it is possible to display arbitrarily levels of brightness by varying the level of the applied voltage.
摘要:
A liquid crystal display device providing a multi tone control function is disclosed, permitting a multi-colored display to be provided by using an analogue display data input, while regulating stepwise the brightness by varying the level of the applied voltage. The liquid crystal display device is composed of serial/parallel converter having a high sampling speed, into which liquid crystal display data are inputted, with function of converting serial image data into parallel image data, and an X axis direction driver having a low sampling speed, into which the liquid crystal display data for one pixel are inputted, with a function of outputting the liquid crystal display data of one line in the horizontal direction, synchronized with a display line signal for a Y axis direction driver. The S/P converter and the X axis direction driver are disposed separately. Further the S/P converter and the X axis direction driver are constructed so as to hold analogue quantities in order to output the liquid crystal display data applied to the liquid crystal driving elements constituting the pixels of a liquid crystal display panel in the form of analogue signals. In this way a multi-colored display of not less than nine colors, using an analogue input, can be effected, and it is possible to display arbitrarily levels of brightness by varying the level of the applied voltage.
摘要:
A data processing apparatus which includes a display unit and a power supply controller for supplying power to the display unit. The display unit has a display screen and a back light controller. The power supply controller comprises a switch, at least one output line for receiving the power from the switch and for supplying therethrough the power to electronic devices, a delay circuit for receiving the power from the switch and when the switch is turned ON to start supply of the power, for outputting the power after passage of a predetermined time from the start of the power supply, and a second output line for supplying the power from the delay circuit to the back light controller therethrough. The display unit has a memory means for storing therein a luminance data on the display screen through the back light controller when the power supply is turned OFF and for determining an output state of the display unit through the back light controller on the basis of the luminance data read out from the memory means when the power supply is turned ON. Further, the data processing apparatus has a means for invalidating output of a display data to be output onto the display screen and a means, after the display data is invalidated, for reducing a frequency of a timing signal or invalidating output of the timing signal for the display unit.
摘要:
An information processing equipment capable of multicolor display, comprising a CPU; a display memory which stores display information therein; a display unit which displays the display information in multiple colors selected from a predetermined number of colors to-be-developed; a display control circuit which controls transfer of information between the CPU and the display memory, and which regularly reads out the display information stored in the display memory and then sends the read-out display information to the display unit; a mode selector which selects one of at least two modes consisting of a first mode and a second mode, and which produces selection information, wherein the first mode causes the display unit to develop a smaller number of multiple colors and to operate at a lower frequency, while the second mode causes the display unit to develop a large number of multiple colors and to operate at a higher frequency; a clock signal generator which generates a plurality of clock signals of unequal frequencies; a clock selector circuit which receives the selection information to select the clock signal of the frequency corresponding to the mode indicated by the selection information, from among the plurality of clock signals delivered from the clock signal generator, and which delivers the selected clock signal to, at least, the display control circuit; and a maximum-number-of-colors selector which is provided in, for example, the display unit, and which receives the selection information to control the number of colors to-be-developed that are to be displayed by the display unit, to the number corresponding to the mode indicated by the selection information.
摘要:
An integrated multimedia system has a multimedia processor disposed in an integrated circuit. A processor is disposed within the multimedia processor which controls the operation of the multimedia processor. A data transfer switch is disposed within the multimedia processor and coupled to the processor which transfers data to various modules of the multimedia processor. A fixed function unit is disposed within the multimedia processor, coupled to the processor and the data transfer switch. A data streamer is coupled to the data transfer switch, and configured to schedule simultaneous data transfers among a plurality of modules disposed within the multimedia processor in accordance with the corresponding channel allocations. As interface unit is coupled to the data streamer and has a plurality of I/O device driver units. A multiplexer coupled to the interface unit provides access between a selected number of I/O device driver units and external I/O devices via output pins.
摘要:
Each processing unit 110a to 110d has an individual cache memory 100a to 100d. When the cache memories read an instruction from a main storage 5, an instruction field is distributed to the cache memories. Each cache memory is controlled by a common control circuit 20. A compiler operates to schedule the processes so as to focus the processes to be executed on a specific processing unit. According to the scheduled processes, the volumes of the cache memories 100a to 100d are specified according to each execution ratio of the corresponding processing units to the cache memories. In the foregoing arrangement, a processor provides the processing units controlled by a sole program counter and improves processing by improving the efficiency of the cache memory. Further, the processor improves the efficiency of the cache memory by deleting unnecessary codes.
摘要:
A unit for efficiently carrying out a comparison operation and making it possible to prevent a generation of a disturbance in a pipeline during a pipeline operation is provided. This unit includes a first storage unit for storing storage information on two data to be compared, kind of comparison operation and result of comparison operation respectively, a second storage unit for storing said two data, kind of comparison operation and result of comparison operation, an operating unit for carrying out a predetermined plurality of kinds of comparison operations for two data, a selecting unit for selecting any one of results of comparison operation, and a processing unit for carrying out a processing of a comparison operation. The processing unit checks a storage destination of two data to be compared, gives the two data to the operating unit, checks a storage destination of a kind of a comparison operation, controls the selecting unit to select a result of an operation corresponding to the kind of comparison operation, and stores the operation result into a storage destination in the second storage unit.