公开(公告)号：US06873167B2

公开(公告)日：2005-03-29

申请号：US10279519

申请日：2002-10-24

申请人： Akihiko Goto ,  Yuko Iwasaki ,  Tsuyoshi Tanaka ,  Koji Tokuno

发明人： Akihiko Goto ,  Yuko Iwasaki ,  Tsuyoshi Tanaka ,  Koji Tokuno

IPC分类号： G01R31/26 ,  G01R31/04 ,  G01R31/28 ,  H01R31/00 ,  H01R43/00 ,  G01R31/02

CPC分类号： H01R31/005 ,  G01R31/2851 ,  G01R31/2889 ,  H01R2201/20

摘要： An evaluation device and method for DUT boards and probe cards which increase the reproducibility of the measured values and decrease the abrasion of pads in evaluation tests. A connection box is provided with contact pins, mounting mechanisms used to mount the DUT boards, and a plurality of connectors which feed signals from the contact pins to the outside.

摘要翻译： 一种用于DUT板和探针卡的评估装置和方法，其在评估测试中增加测量值的重现性并减少垫的磨损。 连接盒设置有接触针，用于安装DUT板的安装机构，以及将接触针的信号馈送到外部的多个连接器。

公开(公告)号：US20110024163A1

公开(公告)日：2011-02-03

申请号：US12512029

申请日：2009-07-30

申请人： Masaharu Goto ,  Minoru Uchida ,  Koji Tokuno

发明人： Masaharu Goto ,  Minoru Uchida ,  Koji Tokuno

IPC分类号： H05K1/05 ,  H05K3/00 ,  H05K1/11

CPC分类号： H05K1/0256 ,  H05K1/181 ,  H05K2201/0723 ,  H05K2201/09036 ,  H05K2201/09072 ,  H05K2201/09972 ,  H05K2201/10166 ,  Y10T29/49155

摘要： A print circuit board includes: a first surface; a guard plane disposed on an inner layer; a high insulated region formed on the first surface of the board so as to be opposed to the guard plane, the high insulated region being substantially surrounded by one or more first guard patterns; and a quasi-high insulated region formed on the first surface of the board so as to be disposed adjacent to the high insulated region. The quasi-high insulated region is substantially surrounded by at least a part of the one or more first guard patterns and by one or more second guard patterns, in which the one or more first guard patterns and the one or more second guard patterns are each formed by forming one or more trenches in the first surface of the board so as to expose the guard plane on a bottom surface of the trenches.

摘要翻译： 印刷电路板包括：第一表面; 设置在内层上的保护平面; 形成在所述基板的所述第一表面上以与所述保护平面相对的高绝缘区域，所述高绝缘区域基本上被一个或多个第一保护图案包围; 以及形成在所述基板的所述第一表面上以准备邻近所述高绝缘区域设置的准高绝缘区域。 准高绝缘区域基本上由一个或多个第一保护图案的至少一部分和一个或多个第二保护图案包围，其中一个或多个第一保护图案和一个或多个第二保护图案各自 通过在所述板的所述第一表面中形成一个或多个沟槽而形成，以便在所述沟槽的底表面上露出所述保护平面。

公开(公告)号：US07307430B2

公开(公告)日：2007-12-11

申请号：US11471789

申请日：2006-06-21

申请人： Koji Tokuno ,  Yoichi Kuboyama ,  Hideki Wakamatsu

发明人： Koji Tokuno ,  Yoichi Kuboyama ,  Hideki Wakamatsu

IPC分类号： G01R27/02 ,  G01R17/10

CPC分类号： G01R27/02

摘要： A method for finding the impedance of a device under test using an impedance measuring apparatus having a modem-type auto-balancing bridge, two or more measurement signals, each of which has a different phase with respect to the reference signals supplied to the modem inside said auto-balancing bridge, are applied to a device under test; the impedance of this device under test is measured when each of the measurement signals is applied to the device under test; and the impedance of this device under test is found using the above-mentioned phase and the impedance measurement value of each of these measurements.

公开(公告)号：US08106305B2

公开(公告)日：2012-01-31

申请号：US12512029

申请日：2009-07-30

申请人： Masaharu Goto ,  Minoru Uchida ,  Koji Tokuno

发明人： Masaharu Goto ,  Minoru Uchida ,  Koji Tokuno

IPC分类号： H05K1/03 ,  H05K7/00

CPC分类号： H05K1/0256 ,  H05K1/181 ,  H05K2201/0723 ,  H05K2201/09036 ,  H05K2201/09072 ,  H05K2201/09972 ,  H05K2201/10166 ,  Y10T29/49155

摘要： A print circuit board includes: a first surface; a guard plane disposed on an inner layer; a high insulated region formed on the first surface of the board so as to be opposed to the guard plane, the high insulated region being substantially surrounded by one or more first guard patterns; and a quasi-high insulated region formed on the first surface of the board so as to be disposed adjacent to the high insulated region. The quasi-high insulated region is substantially surrounded by at least a part of the one or more first guard patterns and by one or more second guard patterns, in which the one or more first guard patterns and the one or more second guard patterns are each formed by forming one or more trenches in the first surface of the board so as to expose the guard plane on a bottom surface of the trenches.

摘要翻译： 印刷电路板包括：第一表面; 设置在内层上的保护平面; 形成在所述基板的所述第一表面上以与所述保护平面相对的高绝缘区域，所述高绝缘区域基本上被一个或多个第一保护图案包围; 以及形成在所述基板的所述第一表面上以准备邻近所述高绝缘区域设置的准高绝缘区域。 准高绝缘区域基本上由一个或多个第一保护图案的至少一部分和一个或多个第二保护图案包围，其中一个或多个第一保护图案和一个或多个第二保护图案各自 通过在所述板的所述第一表面中形成一个或多个沟槽而形成，以便在所述沟槽的底表面上露出所述保护平面。

公开(公告)号：US20070024310A1

公开(公告)日：2007-02-01

申请号：US11471789

申请日：2006-06-21

申请人： Koji Tokuno ,  Yoichi Kuboyama ,  Hideki Wakamatsu

发明人： Koji Tokuno ,  Yoichi Kuboyama ,  Hideki Wakamatsu

IPC分类号： G01R31/26

CPC分类号： G01R27/02

摘要： A method for finding the impedance of a device under test using an impedance measuring apparatus having a modem-type auto-balancing bridge, two or more measurement signals, each of which has a different phase with respect to the reference signals supplied to the modem inside said auto-balancing bridge, are applied to a device under test; the impedance of this device under test is measured when each of the measurement signals is applied to the device under test; and the impedance of this device under test is found using the above-mentioned phase and the impedance measurement value of each of these measurements.

摘要翻译： 一种用于使用具有调制解调器型自动平衡桥的阻抗测量装置来测试被测器件的阻抗的方法，两个或更多个测量信号，每个测量信号相对于提供给调制解调器的参考信号具有不同的相位 所述自动平衡桥适用于被测设备; 当将每个测量信号施加到被测器件时，测量该被测器件的阻抗; 并且使用上述相位和每个这些测量的阻抗测量值来发现该被测器件的阻抗。