公开(公告)号：US07145121B1

公开(公告)日：2006-12-05

申请号：US11061588

申请日：2005-02-18

Applicant: Koy B. Cook, Jr.

Inventor： Koy B. Cook, Jr.

IPC: G01C21/24 ,  G01C21/02 ,  G01J1/20 ,  H01L31/00

CPC classification number: G01J1/02 ,  G01J1/0209 ,  G01J1/0437 ,  G01J1/4228 ,  G01J1/44 ,  H01L27/1443 ,  H01L31/1105

Abstract: A device for detecting radiation direction is an integrated circuit that includes a first and second phototransistor positioned anti-parallel with respect to each other and a reference phototransistor. The device does not require impinging radiation to be mechanically aligned using pinholes, apertures or mechanical slits. The first phototransistor detects the direction of the radiation in an x-plane, and the second phototransistor detects the direction of the radiation in the y-plane. The first and second phototransistors have two differential pairs. The P type base regions are formed in the plane of the silicon to form opposing sidewalls for receiving radiation signals from a radiation source. A current is induced in the PN junction of each phototransistor, thereby causing a current output on the emitters of the phototransistors. The differential currents represent rectangular coordinates describing the direction of the radiation detected on the plane. The reference transistor is a plane phototransistor, and its single current output is used to normalize the differential outputs of the first and second phototransistors. A system that integrates the detection device to determine the azimuth and elevation (spherical coordinates) of the impinging radiation includes a device that translates the normalized current outputs (rectangular coordinates) into spherical coordinates.

Abstract translation: 用于检测辐射方向的装置是包括相对于彼此反平行定位的第一和第二光电晶体管和参考光电晶体管的集成电路。 该装置不需要使用针孔，孔或机械狭缝来机械对准入射辐射。 第一光电晶体管检测x平面中的辐射方向，第二光电晶体管检测在y平面中的辐射方向。 第一和第二光电晶体管有两个差分对。 P型基极区形成在硅的<111>平面内，以形成相对的侧壁，用于接收来自辐射源的辐射信号。 在每个光电晶体管的PN结中感应出电流，从而在光电晶体管的发射极上产生电流输出。 差分电流表示描述在<111>平面上检测到的辐射方向的直角坐标。 参考晶体管是<100>平面光电晶体管，其单电流输出用于归一化第一和第二光电晶体管的差分输出。 集成检测装置以确定入射辐射的方位和仰角（球面坐标）的系统包括将归一化的电流输出（直角坐标）转换为球坐标的装置。

公开(公告)号：US3996656A

公开(公告)日：1976-12-14

申请号：US643979

申请日：1975-12-24

Applicant: Koy B. Cook, Jr.

Inventor： Koy B. Cook, Jr.

IPC: H01L29/04 ,  H01L29/10 ,  H01L29/43 ,  H01L29/47 ,  H01L29/51 ,  H01L29/78 ,  H01L29/812 ,  B01J17/00

CPC classification number: H01L29/78 ,  H01L29/04 ,  H01L29/1029 ,  H01L29/432 ,  H01L29/47 ,  H01L29/51 ,  H01L29/812 ,  Y10S148/053 ,  Y10S148/122 ,  Y10S148/139 ,  Y10S148/147

Abstract: A normally-off field effect transistor having the structure of an IGFET with a substantially undoped semiconductor material replacing the insulation between the substrate and the gate metal. A Schottky barrier formed between the gate metal and the substantially undoped semiconductor material produces a channel in the substrate when reverse biased. Method of fabrication is also described.

Abstract translation: 具有IGFET结构的常闭场效应晶体管，其具有基本上未掺杂的半导体材料，代替衬底和栅极金属之间的绝缘。 形成在栅极金属和基本未掺杂的半导体材料之间的肖特基势垒在反向偏置时在衬底中产生沟道。 还描述了制造方法。

公开(公告)号：US3946415A

公开(公告)日：1976-03-23

申请号：US501204

申请日：1974-08-28

Applicant: Koy B. Cook, Jr.

Inventor： Koy B. Cook, Jr.

IPC: H01L29/00 ,  H01L29/78 ,  H01L29/812 ,  H01L29/48 ,  H01L29/56

CPC classification number: H01L29/78 ,  H01L29/00 ,  H01L29/812

Abstract: A normally-off field effect transistor having the structure of an IGFET with a substantially undoped semiconductor material replacing the insulation between the substrate and the gate metal. A Schottky barrier formed between the gate metal and the substantially undoped semiconductor material produces a channel in the substrate when reverse biased. Method of fabrication is also described.

Abstract translation: 具有IGFET结构的常闭场效应晶体管，其具有基本上未掺杂的半导体材料，代替衬底和栅极金属之间的绝缘。 形成在栅极金属和基本未掺杂的半导体材料之间的肖特基势垒在反向偏置时在衬底中产生沟道。 还描述了制造方法。

公开(公告)号：US4075754A

公开(公告)日：1978-02-28

申请号：US671772

申请日：1976-03-30

Applicant: Koy B. Cook, Jr.

Inventor： Koy B. Cook, Jr.

IPC: H01L21/8238 ,  B01J17/00

CPC classification number: H01L21/8238

Abstract: A process for fabricating complementary metal oxide semiconductors including doping to determine threshold voltage of a first conductivity channel device with second conductivity type impurities, counter-doping to determine the threshold voltage of a second conductivity channel device with second conductivity impurities, forming gate oxide, forming metal gate, and forming source and drain regions using the metal gate as a self-aligned mask. Preferably, the doping steps are performed using ion implantation and photoresist mask.

Abstract translation: 一种用于制造互补金属氧化物半导体的方法，包括掺杂以确定具有第二导电类型杂质的第一导电沟道器件的阈值电压，反掺杂以确定具有第二导电杂质的第二导电沟道器件的阈值电压，形成栅极氧化物，形成 金属栅极，并且使用金属栅极形成源极和漏极区域作为自对准掩模。 优选地，使用离子注入和光致抗蚀剂掩模进行掺杂步骤。