摘要:
A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.
摘要:
A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.
摘要:
System, apparatus, and method to enable and disable a mode of operation of a stacked circuit arrangement on an independent circuit basis using register bits and a single shared mode control line.
摘要:
A memory device may comprise a port to receive remap information regarding a memory device and may comprise a content-addressable memory (CAM) to store the remap information, wherein the CAM may comprise a nonvolatile, discretely-addressable memory.
摘要:
An autonomous memory device in a distributed memory sub-system can receive a database downloaded from a host controller. The autonomous memory device can pass configuration routing information and initiate instructions to disperse portions of the database to neighboring die using an interface that handles inter-die communication. Information is then extracted from the pool of autonomous memory and passed through a host interface to the host controller.
摘要:
An autonomous memory device in a distributed memory sub-system can receive a database downloaded from a host controller. The autonomous memory device can pass configuration routing information and initiate instructions to disperse portions of the database to neighboring die using an interface that handles inter-die communication. Information is then extracted from the pool of autonomous memory and passed through a host interface to the host controller.
摘要:
Described herein are one or more implementations that eliminate the need to switch data-resource access-modes of a flash memory system between a primary main array memory and a secondary supernumerary data resource. The one or more described implementations provide access to the secondary supernumerary data resource through an overlay window in the addressable memory space of primary main array memory. Memory accesses (e.g., reads or writes) which specify a memory location which is within the defined address space of the overlay window are redirected to the secondary supernumerary data resource instead of accessing the primary main array memory.
摘要:
A technique includes sharing common external terminals of a memory device to communicate data and an address with the memory device for a given memory operation. Different sets of address bits indicative of the address are communicated over the common external terminals at different times.