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    Cryptographic module and IC card
    2.
    发明授权
    Cryptographic module and IC card 有权
    加密模块和IC卡

    公开(公告)号：US08457306B2

    公开(公告)日：2013-06-04

    申请号：US11842331

    申请日：2007-08-21

    申请人： Masahiko Motoyama

    发明人： Masahiko Motoyama

    IPC分类号： H04L9/00 ,  H04K1/00

    CPC分类号： H04L9/003 ,  G06F7/00 ,  G06F21/72 ,  G06F21/75 ,  G06F21/77 ,  H04L9/0625 ,  H04L2209/12

    摘要： A cryptographic module that performs a cryptographic operation is provided with: a register that retains first data related to key data to be used in the cryptographic operation; a register that retains second data without dependency on the first data; a selector that alternately selects and outputs the contents of the register retaining the first data and the register retaining the second data; and a left shift circuit that performs a predetermined shift operation on data outputted from the selector.

    摘要翻译： 执行加密操作的加密模块具有：保存与密码操作中要使用的密钥数据相关的第一数据的寄存器; 一个保留第二个数据而不依赖于第一个数据的寄存器; 选择器，交替地选择并输出保留第一数据的寄存器的内容和保留第二数据的寄存器; 以及对从选择器输出的数据执行预定的移位操作的左移位电路。

    CRYPTOGRAPHIC PROCESSOR
    3.
    发明申请
    CRYPTOGRAPHIC PROCESSOR 审中-公开
    印刷加工商

    公开(公告)号：US20100318811A1

    公开(公告)日：2010-12-16

    申请号：US12722887

    申请日：2010-03-12

    申请人： Masahiko Motoyama

    发明人： Masahiko Motoyama

    IPC分类号： G06F21/22 ,  G06F7/58 ,  H04L9/28

    CPC分类号： G06F7/00 ,  G06F21/72 ,  G06F2207/7223 ,  H04L9/003 ,  H04L9/0618 ,  H04L2209/08 ,  H04L2209/125 ,  H04L2209/24

    摘要： A cryptographic processor includes: first and second round function operation circuits, each of which executes cryptographic processing; and a control circuit configured to operate the first and second round function operation circuits by randomly switching between a parallel operation mode used to operate the first and second round function operation circuits in parallel and a serial operation mode used to operate the first and second round function operation circuits in series.

    摘要翻译： 密码处理器包括：第一和第二循环函数运算电路，每个执行密码处理; 以及控制电路，被配置为通过在用于并行操作第一和第二循环功能操作电路的并行操作模式和用于操作第一和第二循环功能的串行操作模式之间随机切换来操作第一和第二循环功能操作电路 操作电路串联。

    ENCRYPTION PROCESSING CIRCUIT AND ENCRYPTION PROCESSING METHOD
    5.
    发明申请
    ENCRYPTION PROCESSING CIRCUIT AND ENCRYPTION PROCESSING METHOD 有权
    加密处理电路和加密处理方法

    公开(公告)号：US20080212776A1

    公开(公告)日：2008-09-04

    申请号：US11934345

    申请日：2007-11-02

    申请人： Masahiko MOTOYAMA

    发明人： Masahiko MOTOYAMA

    IPC分类号： H04K1/02 ,  H04L9/28 ,  H04L9/00

    CPC分类号： H04L9/0625 ,  H04L9/003 ,  H04L2209/046 ,  H04L2209/12

    摘要： An encryption processing circuit includes: a decoder configured to convert a binary input data used for predetermined encryption computing into a first plurality of bit data of a constant hamming weight independently of a hamming weight of the input data; a wiring network configured to receive the first plurality of bit data converted by the decoder, the wiring network further configured, for the purpose of the predetermined encryption computing, to change a bit pattern of the received first plurality of bit data by replacing bit positions of the first plurality of bit data, and to generate a second plurality of bit data; and an encoder configured to convert the second plurality of bit data generated in the wiring network into a binary output data.

    摘要翻译： 加密处理电路包括：解码器，被配置为独立于输入数据的汉明权重将用于预定加密计算的二进制输入数据转换成恒定汉明权重的第一多个比特数据; 配置为接收由解码器转换的第一多个比特数据的布线网络，为了预定的加密计算，进一步配置的布线网络通过将所接收的第一多个比特数据的比特位置 所述第一多个比特数据，并且生成第二多个比特数据; 以及编码器，被配置为将在所述布线网络中生成的所述第二多个位数据转换为二进制输出数据。

    CRYPTOGRAPHIC MODULE AND IC CARD
    6.
    发明申请
    CRYPTOGRAPHIC MODULE AND IC CARD 有权
    CRYPTOGRAPHIC模块和IC卡

    公开(公告)号：US20080056488A1

    公开(公告)日：2008-03-06

    申请号：US11842331

    申请日：2007-08-21

    申请人： Masahiko MOTOYAMA

    发明人： Masahiko MOTOYAMA

    IPC分类号： H04L9/28

    CPC分类号： H04L9/003 ,  G06F7/00 ,  G06F21/72 ,  G06F21/75 ,  G06F21/77 ,  H04L9/0625 ,  H04L2209/12

    摘要： A cryptographic module that performs a cryptographic operation is provided with: a register that retains first data related to key data to be used in the cryptographic operation; a register that retains second data without dependency on the first data; a selector that alternately selects and outputs the contents of the register retaining the first data and the register retaining the second data; and a left shift circuit that performs a predetermined shift operation on data outputted from the selector.

    摘要翻译： 执行加密操作的加密模块具有：保存与密码操作中要使用的密钥数据相关的第一数据的寄存器; 一个保留第二个数据而不依赖于第一个数据的寄存器; 选择器，交替地选择并输出保留第一数据的寄存器的内容和保留第二数据的寄存器; 以及对从选择器输出的数据执行预定的移位操作的左移位电路。

    Method and apparatus for encrypting data
    7.
    发明授权
    Method and apparatus for encrypting data 有权
    用于加密数据的方法和装置

    公开(公告)号：US07159115B2

    公开(公告)日：2007-01-02

    申请号：US10658340

    申请日：2003-09-10

    申请人： Koichi Fujisaki ,  Atsushi Shimbo ,  Masahiko Motoyama ,  Hanae Ikeda ,  Yuuki Tomoeda

    发明人： Koichi Fujisaki ,  Atsushi Shimbo ,  Masahiko Motoyama ,  Hanae Ikeda ,  Yuuki Tomoeda

    IPC分类号： G06F1/24

    CPC分类号： H04L9/003

    摘要： An encryption apparatus provided with a Feistel type encryption algorithm includes a function operation unit that operates a non-linear function, and changing unit configured to supply the function operation unit with random data unrelated to an encryption operation result. In this way, a countermeasure can be taken against a DPA attack following the end of an operation by the encryption operation apparatus provided with the Feistel type encryption algorithm.

    摘要翻译： 具有Feistel型加密算法的加密装置包括操作非线性功能的功能操作单元，以及改变单元，被配置为向功能操作单元提供与加密操作结果无关的随机数据。 以这种方式，可以针对具有Feistel类型加密算法的加密操作装置的操作结束后的DPA攻击采取对策。

    High Speed Flexible Printed Circuit Connector
    9.
    发明申请
    High Speed Flexible Printed Circuit Connector 有权

    公开(公告)号：US20130267110A1

    公开(公告)日：2013-10-10

    申请号：US13880836

    申请日：2011-10-14

    申请人： Motomu Kajiura ,  Naotaka Sasame ,  Masahiko Motoyama

    发明人： Motomu Kajiura ,  Naotaka Sasame ,  Masahiko Motoyama

    IPC分类号： H01R12/72

    CPC分类号： H01R12/774 ,  H01R12/72 ,  H01R12/79 ,  H01R12/88 ,  H01R13/6471 ,  H01R13/6477 ,  H01R13/6597

    摘要： A high speed flexible printed circuit (FPC) connector includes a housing with ground and signal contact terminal pairs arranged in the housing in a staggered manner along a lateral direction. The housing has a cavity for receiving an FPC board therein. Each ground contact terminal has an upper arm positioned adjacent to a top wall of the cavity and a lower arm positioned adjacent to a bottom wall of the cavity. Each signal contact terminal has only a lower arm positioned adjacent to the bottom wall of the cavity. Signal contact terminals with the only lower arm provide the connector with better signal integrity. An actuator is coupled to the housing for fixing the FPC board in the cavity to establish electrical connections. The actuator has recesses corresponding to the positions of the signal pairs to provide a dielectric constant different from that of the other parts of the actuator.

    CRYPTOGRAPHIC PROCESSOR AND IC CARD
    10.
    发明申请
    CRYPTOGRAPHIC PROCESSOR AND IC CARD 审中-公开
    编码处理器和IC卡

    公开(公告)号：US20100257373A1

    公开(公告)日：2010-10-07

    申请号：US12715558

    申请日：2010-03-02

    申请人： Masahiko Motoyama

    发明人： Masahiko Motoyama

    IPC分类号： G06F12/14

    CPC分类号： G06F21/755

    摘要： A cryptographic processor has a first cryptographic processing circuit configured to perform first cryptographic processing on input first data, and a second cryptographic processing circuit configured to perform second cryptographic processing different from the first cryptographic processing on input second data by using a processing result from the first cryptographic processing circuit as mask data.

    摘要翻译： 密码处理器具有：第一加密处理电路，被配置为对输入的第一数据执行第一密码处理;以及第二密码处理电路，被配置为通过使用来自所述第一数据的处理结果，对与输入的第二数据进行的第一密码处理不同的第二密码处理 密码处理电路作为掩码数据。