公开(公告)号：US07528410B2

公开(公告)日：2009-05-05

申请号：US11584524

申请日：2006-10-23

申请人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

发明人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

IPC分类号： H01L29/12 ,  H01L29/786

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78648

摘要： A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: forming a semiconductor layer 3 having a source and a drain regions 10, 11, and LDD regions 16, 17; a gate insulating film 5; and a gate electrode 6; forming a first and a second interlayer insulating films 24, 25 over the gate electrode 6 and the gate insulating film 5; forming contact holes 25a, 25c to these interlayer insulating films so as to be located over each of the source region and the drain region; and an opening portion 25b to these interlayer insulating films so as to be located over the gate electrode and the LDD region; forming a second gate electrode 26b by a conductive film in the opening portion so as to cover the gate electrode and the LDD region; and a pixel electrode 26a over the second interlayer insulating film; removing the gate insulating film in the contact hole; and forming wirings 27, 28 connected to each the source region and the drain region.

摘要翻译： 公开了可以通过减少掩模数而降低成本的半导体器件，并且公开了一种用于制造半导体器件的方法。 制造半导体器件的方法包括以下步骤：形成具有源极和漏极区域10,11以及LDD区域16,17的半导体层3; 栅极绝缘膜5; 和栅电极6; 在栅极电极6和栅极绝缘膜5上形成第一和第二层间绝缘膜24,25; 将这些层间绝缘膜形成接触孔25a，25c，以便位于源极区域和漏极区域的每一个上; 和这些层间绝缘膜的开口部25b，以位于栅电极和LDD区之上; 通过开口部中的导电膜形成第二栅电极26b，以覆盖栅电极和LDD区; 和在第二层间绝缘膜上方的像素电极26a; 去除接触孔中的栅极绝缘膜; 以及形成连接到每个源极区域和漏极区域的布线27,28。

公开(公告)号：US07157321B2

公开(公告)日：2007-01-02

申请号：US10963822

申请日：2004-10-14

申请人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

发明人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

IPC分类号： H01L21/338 ,  H01L21/84

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78648

摘要： A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: forming a semiconductor layer 3 having a source and a drain regions 10, 11, and LDD regions 16, 17; a gate insulating film 5; and a gate electrode 6; forming a first and a second interlayer insulating films 24, 25 over the gate electrode 6 and the gate insulating film 5; forming contact holes 25a, 25c to these interlayer insulating films so as to be located over each of the source region and the drain region; and an opening portion 25b to these interlayer insulating films so as to be located over the gate electrode and the LDD region; forming a second gate electrode 26b by a conductive film in the opening portion so as to cover the gate electrode and the LDD region; and a pixel electrode 26a over the second interlayer insulating film; removing the gate insulating film in the contact hole; and forming wirings 27, 28 connected to each the source region and the drain region.

摘要翻译： 公开了可以通过减少掩模数而降低成本的半导体器件，并且公开了一种用于制造半导体器件的方法。 制造半导体器件的方法包括以下步骤：形成具有源极和漏极区域10,11以及LDD区域16,17的半导体层3; 栅极绝缘膜5; 和栅电极6; 在栅极电极6和栅极绝缘膜5上形成第一和第二层间绝缘膜24,25; 向这些层间绝缘膜形成接触孔25a，25c，以便位于源极区域和漏极区域之上; 和这些层间绝缘膜的开口部分25b，以便位于栅电极和LDD区之上; 通过开口部中的导电膜形成第二栅电极26b，以覆盖栅电极和LDD区; 以及在第二层间绝缘膜上的像素电极26a; 去除接触孔中的栅极绝缘膜; 以及形成连接到每个源极区域和漏极区域的布线27,28。

公开(公告)号：US20070034874A1

公开(公告)日：2007-02-15

申请号：US11584524

申请日：2006-10-23

申请人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

发明人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78648

摘要： A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: forming a semiconductor layer 3 having a source and a drain regions 10, 11, and LDD regions 16, 17; a gate insulating film 5; and a gate electrode 6; forming a first and a second interlayer insulating films 24, 25 over the gate electrode 6 and the gate insulating film 5; forming contact holes 25a, 25c to these interlayer insulating films so as to be located over each of the source region and the drain region; and an opening portion 25b to these interlayer insulating films so as to be located over the gate electrode and the LDD region; forming a second gate electrode 26b by a conductive film in the opening portion so as to cover the gate electrode and the LDD region; and a pixel electrode 26a over the second interlayer insulating film; removing the gate insulating film in the contact hole; and forming wirings 27, 28 connected to each the source region and the drain region.

摘要翻译： 公开了可以通过减少掩模数而降低成本的半导体器件，并且公开了一种用于制造半导体器件的方法。 制造半导体器件的方法包括以下步骤：形成具有源极和漏极区域10,11以及LDD区域16,17的半导体层3; 栅极绝缘膜5; 和栅电极6; 在栅极电极6和栅极绝缘膜5上形成第一和第二层间绝缘膜24,25; 向这些层间绝缘膜形成接触孔25a，25c，以便位于源极区域和漏极区域之上; 和这些层间绝缘膜的开口部分25b，以便位于栅电极和LDD区之上; 通过开口部中的导电膜形成第二栅电极26b，以覆盖栅电极和LDD区; 以及在第二层间绝缘膜上的像素电极26a; 去除接触孔中的栅极绝缘膜; 以及形成连接到每个源极区域和漏极区域的布线27,28。

公开(公告)号：US20050082537A1

公开(公告)日：2005-04-21

申请号：US10963822

申请日：2004-10-14

申请人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

发明人： Tatsuya Arao ,  Takeshi Noda ,  Takuya Matsuo ,  Hidehito Kitakado ,  Masanori Kyoho

IPC分类号： G02F1/1343 ,  G02F1/1368 ,  H01L21/20 ,  H01L21/28 ,  H01L21/336 ,  H01L21/77 ,  H01L21/86 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L29/04

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78648

摘要： A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: forming a semiconductor layer 3 having a source and a drain regions 10, 11, and LDD regions 16, 17; a gate insulating film 5; and a gate electrode 6; forming a first and a second interlayer insulating films 24, 25 over the gate electrode 6 and the gate insulating film 5; forming contact holes 25a, 25c to these interlayer insulating films so as to be located over each of the source region and the drain region; and an opening portion 25b to these interlayer insulating films so as to be located over the gate electrode and the LDD region; forming a second gate electrode 26b by a conductive film in the opening portion so as to cover the gate electrode and the LDD region; and a pixel electrode 26a over the second interlayer insulating film; removing the gate insulating film in the contact hole; and forming wirings 27, 28 connected to each the source region and the drain region.

摘要翻译： 公开了可以通过减少掩模数而降低成本的半导体器件，并且公开了一种用于制造半导体器件的方法。 制造半导体器件的方法包括以下步骤：形成具有源极和漏极区域10,11以及LDD区域16,17的半导体层3; 栅极绝缘膜5; 和栅电极6; 在栅极电极6和栅极绝缘膜5上形成第一和第二层间绝缘膜24,25; 向这些层间绝缘膜形成接触孔25a，25c，以便位于源极区域和漏极区域之上; 和这些层间绝缘膜的开口部分25b，以便位于栅电极和LDD区之上; 通过开口部中的导电膜形成第二栅电极26b，以覆盖栅电极和LDD区; 以及在第二层间绝缘膜上的像素电极26a; 去除接触孔中的栅极绝缘膜; 以及形成连接到每个源极区域和漏极区域的布线27,28。