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    METHOD AND APPARATUS TO ENCODE AND SYNCHRONIZE A SERIAL INTERFACE
    1.
    发明申请
    METHOD AND APPARATUS TO ENCODE AND SYNCHRONIZE A SERIAL INTERFACE 有权
    编码和同步串行接口的方法和装置

    公开(公告)号：US20090316728A1

    公开(公告)日：2009-12-24

    申请号：US12548135

    申请日：2009-08-26

    申请人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    发明人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    IPC分类号： H04J3/06

    CPC分类号： H04L7/10 ,  G11C7/1006 ,  H04L25/03866 ,  H04L25/4904 ,  H04L25/491

    摘要： The present disclosure is generally directed to a method and apparatus to communicate data between two or more semiconductor devices. In an embodiment, a method includes synchronizing a master device with a slave device, where the master device includes a semiconductor device. Synchronizing includes transmitting a first synchronization marker data pattern via a first serial interface from the master device at a first time, and receiving a second synchronization marker data pattern via a second serial interface at the master device at a second time in response to transmitting the first synchronization marker data pattern. Synchronizing also includes determining, based at least in part on the first time and the second time, a third time when a reply is to be received by the master device in response to a request transmitted from the master device to the slave device.

    摘要翻译： 本公开一般涉及在两个或更多个半导体器件之间传送数据的方法和装置。 在一个实施例中，一种方法包括使主设备与从设备同步，其中主设备包括半导体设备。 同步包括在第一时间通过第一串行接口从主设备发送第一同步标记数据模式，以及响应于发送第一同步标记数据模式，通过主设备上的第二串行接口在第二时间接收第二同步标记数据模式 同步标记数据模式。 同步还包括至少部分地基于第一时间和第二时间响应于从主设备向从设备发送的请求而主要设备接收到应答的第三次。

    Method and apparatus to encode and synchronize a serial interface
    4.
    发明授权
    Method and apparatus to encode and synchronize a serial interface 有权
    串行接口编码和同步的方法和装置

    公开(公告)号：US08135037B2

    公开(公告)日：2012-03-13

    申请号：US12548135

    申请日：2009-08-26

    申请人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    发明人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    IPC分类号： H04J3/06 ,  H03M13/03

    CPC分类号： H04L7/10 ,  G11C7/1006 ,  H04L25/03866 ,  H04L25/4904 ,  H04L25/491

    摘要： The present disclosure is generally directed to a method and apparatus to communicate data between two or more semiconductor devices. In an embodiment, a method includes synchronizing a master device with a slave device, where the master device includes a semiconductor device. Synchronizing includes transmitting a first synchronization marker data pattern via a first serial interface from the master device at a first time, and receiving a second synchronization marker data pattern via a second serial interface at the master device at a second time in response to transmitting the first synchronization marker data pattern. Synchronizing also includes determining, based at least in part on the first time and the second time, a third time when a reply is to be received by the master device in response to a request transmitted from the master device to the slave device.

    摘要翻译： 本公开一般涉及在两个或更多个半导体器件之间传送数据的方法和装置。 在一个实施例中，一种方法包括使主设备与从设备同步，其中主设备包括半导体设备。 同步包括在第一时间通过第一串行接口从主设备发送第一同步标记数据模式，以及响应于发送第一同步标记数据模式，通过主设备上的第二串行接口在第二时间接收第二同步标记数据模式 同步标记数据模式。 同步还包括至少部分地基于第一时间和第二时间响应于从主设备向从设备发送的请求而主要设备接收到应答的第三次。

    Memory system and memory device having a serial interface
    6.
    发明授权
    Memory system and memory device having a serial interface 有权
    具有串行接口的存储器系统和存储器件

    公开(公告)号：US07167410B2

    公开(公告)日：2007-01-23

    申请号：US11114807

    申请日：2005-04-26

    申请人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    发明人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    IPC分类号： G11C8/00

    CPC分类号： G11C8/04 ,  G11C7/1006 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/107

    摘要： A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to receive a signal from a reference clock source that provides a reference clock signal to a memory control device. The serial interfaces are coupled to other memory devices or memory control devices. A method of transferring data within a memory system using serial interfaces is also disclosed. The method includes performing clock multiplication on a reference clock to provide a multiplied clock, using the multiplied clock to serialize and transmit data onto a serial interface, recovering data from the seal interface, using the reference clock to determine an initial frequency for use by clock and data recovery module, using the data recovered from the serial interface to determine a phase and final frequency of a recovered clock, and using the recovered clock to de-serialize received serial data into parallel data words.

    摘要翻译： 公开了一种可以包括串行数据接口，串行地址接口和参考时钟接口的存储器件和系统。 参考时钟接口被配置为从参考时钟源接收信号，该信号将参考时钟信号提供给存储器控制装置。 串行接口耦合到其他存储器设备或存储器控制设备。 还公开了使用串行接口在存储器系统内传送数据的方法。 该方法包括在参考时钟上执行时钟倍增以提供倍增时钟，使用倍增时钟将数据串行化并传输到串行接口，从密封接口恢复数据，使用参考时钟确定时钟使用的初始频率 和数据恢复模块，使用从串行接口恢复的数据来确定恢复的时钟的相位和最终频率，并且使用恢复的时钟将接收到的串行数据解码为并行数据字。

    Memory system and memory device having a serial interface
    7.
    发明申请
    Memory system and memory device having a serial interface 有权
    具有串行接口的存储器系统和存储器件

    公开(公告)号：US20060239107A1

    公开(公告)日：2006-10-26

    申请号：US11114807

    申请日：2005-04-26

    申请人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    发明人： Charles Boecker ,  Scott Irwin ,  Matthew Shafer ,  Eric Groen ,  Aaron Hoelscher ,  Andrew Jenkins ,  David Black

    IPC分类号： G11C8/00

    CPC分类号： G11C8/04 ,  G11C7/1006 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/107

    摘要： A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to receive a signal from a reference clock source that provides a reference clock signal to a memory control device. The serial interfaces are coupled to other memory devices or memory control devices. A method of transferring data within a memory system using serial interfaces is also disclosed. The method includes performing clock multiplication on a reference clock to provide a multiplied clock, using the multiplied clock to serialize and transmit data onto a serial interface, recovering data from the seal interface, using the reference clock to determine an initial frequency for use by clock and data recovery module, using the data recovered from the serial interface to determine a phase and final frequency of a recovered clock, and using the recovered clock to de-serialize received serial data into parallel data words.

    摘要翻译： 公开了一种可以包括串行数据接口，串行地址接口和参考时钟接口的存储器件和系统。 参考时钟接口被配置为从参考时钟源接收信号，该信号将参考时钟信号提供给存储器控制装置。 串行接口耦合到其他存储器设备或存储器控制设备。 还公开了使用串行接口在存储器系统内传送数据的方法。 该方法包括在参考时钟上执行时钟倍增以提供倍增时钟，使用倍增时钟将数据串行化并传输到串行接口，从密封接口恢复数据，使用参考时钟确定时钟使用的初始频率 和数据恢复模块，使用从串行接口恢复的数据来确定恢复的时钟的相位和最终频率，并且使用恢复的时钟将接收到的串行数据解码为并行数据字。