公开(公告)号：US06788063B1

公开(公告)日：2004-09-07

申请号：US10248877

申请日：2003-02-26

申请人： William Todd Peterson ,  Michael Edward Denzin ,  Randall Henry Buchwald

发明人： William Todd Peterson ,  Michael Edward Denzin ,  Randall Henry Buchwald

IPC分类号： G01V300

CPC分类号： G01R33/565 ,  G01R33/28

摘要： A transient noise detection system includes an imaging system having a magnetic field coil and an imaging bore. The imaging system generates an imaging signal through a signal cable, wherein the imaging signal is corruptible by a noise event. A noise event detector is positioned outside of the imaging bore and proximate to the signal cable. This detector detects the noise event from the signal cable and generates a noise signal therefrom.

摘要翻译： 瞬态噪声检测系统包括具有磁场线圈和成像孔的成像系统。 成像系统通过信号电缆产生成像信号，其中成像信号可被噪声事件所破坏。 噪声事件检测器位于成像孔的外部并靠近信号电缆。 该检测器检测来自信号电缆的噪声事件，并从其产生噪声信号。

公开(公告)号：US6157271A

公开(公告)日：2000-12-05

申请号：US197986

申请日：1998-11-23

申请人： Gregory Redmond Black ,  Louis Michael Nigra ,  Michael Edward Denzin

发明人： Gregory Redmond Black ,  Louis Michael Nigra ,  Michael Edward Denzin

IPC分类号： H03L7/00 ,  H03C3/09 ,  H03L7/093 ,  H03L7/197 ,  H04B1/04 ,  H04L27/12 ,  H03C3/00 ,  H03L7/10 ,  H03L7/16

CPC分类号： H03C3/0991 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0966 ,  H03L7/093 ,  H03L7/197 ,  H03L7/1976

摘要： A direct modulation phase lock loop (PLL) a voltage controlled oscillator (VCO) (114). A divider (118) has a first divider input coupled to the VCO and a second divider input to receive a modulation inducing divisor sequence. A phase detector (102) has a first detector input coupled to the divider to receive the output thereof, and a second detector input to receive a reference input. A tuning circuit (306, 406) is coupled to the phase detector and the VCO, the tuning circuit responsive to a variable DC reference potential such that the tuning circuit has a frequency response that is constant over the modulation bandwidth whereby the PLL is a type 1 PLL with low modulation distortion.

摘要翻译： 直接调制锁相环（PLL）压控振荡器（VCO）（114）。 分频器（118）具有耦合到VCO的第一分频器输入端和用于接收调制诱导除数序列的第二分频器输入端。 相位检测器（102）具有耦合到分频器以接收其输出的第一检测器输入和用于接收参考输入的第二检测器输入。 调谐电路（306,406）耦合到相位检测器和VCO，该调谐电路响应于可变的直流参考电位，使得调谐电路具有在调制带宽上恒定的频率响应，由此PLL是类型 1 PLL具有低调制失真。